MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 163

• Manufacturer Part Number: MC68HC908RF2CFA
• Description: IC MCU W/UHF TX 2K FLASH 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

13.3.1.1 Monitor Mode Entry
MC68HC908RF2 — Rev. 4.0
MOTOROLA
NOTE:
While simple monitor commands can access any memory address, the
MC68HC908RF2 has a FLASH security feature to prevent external viewing of the
contents of FLASH. Proper procedures must be followed to verify FLASH content.
Access to the FLASH is denied to unauthorized users of customer-specified
software (see
In monitor mode, the MCU can execute host-computer code in RAM while all MCU
pins except PTA0 retain normal operating mode functions. All communication
between the host computer and the MCU is through the PTA0 pin. A level-shifting
and multiplexing interface is required between PTA0 and the host computer. PTA0
is used in a wired-OR configuration and requires a pullup resistor.
Table 13-1
Enter monitor mode by either:
Upon entering monitor mode, an interrupt stack frame plus a stacked H register will
leave the stack pointer at address $00F9.
Once out of reset, the MCU waits for the host to send eight security bytes (see
13.3.2
consecutive logic 0s) to the host computer, indicating that it is ready to receive a
command.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt. The
alternate vectors are in the $FE page instead of the $FF page and allow code
execution from the internal monitor firmware instead of user code. The COP
module is disabled in monitor mode as long as V
Specifications) is applied to either the IRQ1 pin or the RST pin. (See
System Integration Module (SIM)
The ICG module is bypassed in monitor mode as long as V
pin. RST does not affect the ICG.
1. If the high voltage (V
2. For V
V
•
•
IRQ
TST
Pin
select bit (CS) controls the source of CGMOUT.
14.2 Absolute Maximum
(2)
Executing a software interrupt instruction (SWI), or
Applying a logic 0 and then a logic 1 to the RST pin
Freescale Semiconductor, Inc.
Security). After the security bytes, the MCU sends a break signal (10
TST
For More Information On This Product,
, see see
shows the pin conditions for entering monitor mode.
PTB0
13.3.2
Pin
1
Go to: www.freescale.com
14.6 3.0-Volt DC Electrical Characteristics Excluding UHF Module
TST
Development Support
Security).
) is removed from the IRQ pin while in monitor mode, the clock
Table 13-1. Monitor Mode Entry
PTB2
Pin
Ratings.
0
PTA0
for more information on modes of operation.)
Pin
1
CGMOUNT
CGMXCLK
---------------------------- -
HI
(see
2
Section 14. Electrical
(1)
HI
is applied to the IRQ1
Development Support
Monitor Module
Frequency
CGMOUT
------------------------- -
Section 10.
Bus
2
Data Sheet
and
163