MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 117

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MC68HC908RF2CFA

Manufacturer Part Number
MC68HC908RF2CFA
Description
IC MCU W/UHF TX 2K FLASH 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908RF2CFA

Core Processor
HC08
Core Size
8-Bit
Speed
4MHz
Peripherals
LVD, POR, PWM, RF Mod
Number Of I /o
12
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

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119
10.3.2.1 Power-On Reset
MC68HC908RF2 — Rev. 4.0
MOTOROLA
signal then follows the sequence from the falling edge of RST shown in
10-5.
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other
chips within a system built around the MCU.
When power is first applied to the MCU, the power-on reset module (POR)
generates a pulse to indicate that power-on has occurred. The external reset pin
(RST) is held low while the SIM counter counts out 4096 CGMXCLK cycles.
Another 64 CGMXCLK cycles later, the CPU and memories are released from
reset to allow the reset vector sequence to occur.
At power-on, these events occur:
CGMXCLK
IRST
RST
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables CGMOUT.
Internal clocks to the CPU and modules are held inactive for 4096
CGMXCLK cycles to allow stabilization of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the SIM reset status register (SRSR) is set and all other bits
in the register are cleared.
Freescale Semiconductor, Inc.
IAB
For More Information On This Product,
System Integration Module (SIM)
Go to: www.freescale.com
Figure 10-6. Sources of Internal Reset
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 10-5. Internal Reset Timing
COPRST
32 CYCLES
POR
LVI
INTERNAL RESET
32 CYCLES
System Integration Module (SIM)
Reset and System Initialization
VECTOR HIGH
Figure
Data Sheet
117

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