MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 48

• Manufacturer Part Number: MC68HC908RF2CFA
• Description: IC MCU W/UHF TX 2K FLASH 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Computer Operating Properly Module (COP)
4.3 I/O Signals
4.3.1 CGMXCLK
4.3.2 STOP Instruction
4.3.3 COPCTL Write
4.3.4 Power-On Reset
4.3.5 Internal Reset
Data Sheet
48
NOTE:
NOTE:
The COP counter is a free-running 6-bit counter preceded by a 12-bit prescaler. If
not cleared by software, the COP counter overflows and generates an
asynchronous reset after 2
state of the COP rate select bit, COPRS, in the configuration register. When
COPRS = 1, a 4.9152-MHz crystal gives a COP timeout period of 53.3 ms. Writing
any value to location $FFFF before an overflow occurs prevents a COP reset by
clearing the COP counter and stages 5 through 12 of the prescaler.
Service the COP immediately after reset and before entering or after exiting stop
mode to guarantee the maximum time before the first COP counter overflow.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the COP bit
in the SIM reset status register (SRSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ pin is held at V
During the break state, V
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from generating a
reset even while the main program is not working properly.
The following paragraphs describe the signals shown in
CGMXCLK is the oscillator output signal. See
description of CGMXCLK.
The STOP instruction clears the COP prescaler.
Writing any value to the COP control register (COPCTL) (see
Register) clears the COP counter and clears stages 12 through 5 of the COP
prescaler. Reading the COP control register returns the reset vector.
The power-on reset (POR) circuit clears the COP prescaler 4096 CGMXCLK
cycles after power-up.
An internal reset clears the COP prescaler and the COP counter.
Freescale Semiconductor, Inc.
For More Information On This Product,
Computer Operating Properly Module (COP)
Go to: www.freescale.com
TST
13
– 2
on the RST pin disables the COP.
4
or 2
18
– 2
4
CGMXCLK cycles, depending on the
6.3.5 Clock Selection Circuit
Figure
MC68HC908RF2 — Rev. 4.0
4.4 COP Control
4-1.
MOTOROLA
for a
TST
.