MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 170

• Manufacturer Part Number: MC68HC908RF2CFA
• Description: IC MCU W/UHF TX 2K FLASH 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Development Support
Data Sheet
170
NOTE:
Note: Any delay between rising IRQ and rising V
RST
PA0
IRQ
V
Notes: 1 = Echo delay (2 bit times)
DD
2 = Data return delay (2 bit times)
3 = Wait 1 bit time before sending next byte.
If the received bytes match those at locations $FFF6–$FFFD, the host bypasses
the security feature and can read all FLASH locations and execute code from
FLASH. Security remains bypassed until a power-on reset occurs. After the host
bypasses security, any reset other than a power-on reset requires the host to send
another eight bytes, but security remains bypassed regardless of the data that the
host sends.
If the received bytes do not match the data at locations $FFF6–$FFFD, the host
fails to bypass the security feature. The MCU remains in monitor mode, but reading
FLASH locations returns undefined data, and trying to execute code from FLASH
causes an illegal address reset. After the host fails to bypass security, any reset
other than a power-on reset causes an endless loop of illegal address resets.
After receiving the eight security bytes from the host, the MCU transmits a break
character signalling that it is ready to receive a command.
The MCU does not transmit a break character until after the host sends the eight
security bytes.
SEE NOTE
256 CGMXCLK CYCLES
ONE BIT TIME
Freescale Semiconductor, Inc.
Figure 13-13. Monitor Mode Entry Timing
FROM HOST
FROM MCU
4096 + 32 CGMXCLK CYCLES
For More Information On This Product,
24 CGMXCLK CYCLES
Go to: www.freescale.com
DD
will guarantee that the MCU bus is driven by the external clock.
Development Support
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MC68HC908RF2 — Rev. 4.0
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MOTOROLA