MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 49

• Manufacturer Part Number: MC68HC908RF2CFA
• Description: IC MCU W/UHF TX 2K FLASH 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

4.3.6 Reset Vector Fetch
4.3.7 COPD
4.3.8 COPRS
4.4 COP Control Register
4.5 Interrupts
4.6 Monitor Mode
4.7 Low-Power Modes
4.7.1 Wait Mode
MC68HC908RF2 — Rev. 4.0
MOTOROLA
A reset vector fetch occurs when the vector address appears on the data bus. A
reset vector fetch clears the COP prescaler.
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register. (See
The COPRS signal reflects the state of the COP rate select bit (COPRS) in the
configuration register. (See
The COP control register is located at address $FFFF and overlaps the reset
vector. Writing any value to $FFFF clears the COP counter and starts a new
timeout period. Reading location $FFFF returns the low byte of the reset vector.
The COP does not generate CPU interrupt requests.
The COP is disabled in monitor mode when V
the RST pin.
The WAIT and STOP instructions put the MCU in low power-consumption standby
modes.
The COP remains active in wait mode. To prevent a COP reset during wait mode,
periodically clear the COP counter in a CPU interrupt routine.
Address: $FFFF
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Computer Operating Properly Module (COP)
Bit 7
Go to: www.freescale.com
Figure 4-2. COP Control Register (COPCTL)
6
Section 3. Configuration Register
Section 3. Configuration Register
5
LOW BYTE OF RESET VECTOR
CLEAR COP COUNTER
Unaffected by reset
4
Computer Operating Properly Module (COP)
TST
3
is present on the IRQ pin or on
2
COP Control Register
(CONFIG)).
(CONFIG)).
1
Data Sheet
Bit 0
49