MC68HC908RF2CFA Freescale Semiconductor, MC68HC908RF2CFA Datasheet - Page 34

• Manufacturer Part Number: MC68HC908RF2CFA
• Description: IC MCU W/UHF TX 2K FLASH 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Memory
2.5.5 FLASH 2TS Block Protection
2.5.6 FLASH 2TS Block Protect Register
Data Sheet
34
NOTE:
In performing a program or erase operation, the FLASH 2TS block protect register
must be read after setting the PGM or ERASE bit and before asserting the HVEN
bit.
Due to the ability of the on-board charge pump to erase and program the FLASH
2TS memory in the target application, provision is made for protecting blocks of
memory from unintentional erase or program operations due to system
malfunction. This protection is implemented by a reserved location in the memory
for block protect information. This block protect register must be read before setting
HVEN = 1. When the block protect register is read, its contents are latched by the
FLASH 2TS control logic. If the address range for an erase or program operation
includes a protected block, the PGM or ERASE bit is cleared which prevents the
HVEN bit in the FLASH 2TS control register from being set such that no
high-voltage operation is allowed in the array.
When the block protect register is erased (all 0s), the entire memory is accessible
for program and erase. When bits within the register are programmed, they lock
blocks of memory address ranges as shown in
Register. The block protect register itself can be erased or programmed only with
an external voltage V
pin also allows entry into monitor mode out of reset. Therefore, the ability to change
the block protect register is voltage-level dependent and can occur in either user or
monitor modes.
The block protect register (FLBPR) is implemented as a byte within the FLASH 2TS
memory. Each bit, when programmed, protects a range of addresses in the FLASH
2TS.
BPR3 — Block Protect Register Bit 3
Address:
This bit protects the memory contents in the address ranges $7A00–$7FEF and
$FFF0–$FFFF.
Reset:
Read:
Write:
1 = Address range protected from erase or program
0 = Address range open to erase or program
Freescale Semiconductor, Inc.
Figure 2-5. FLASH 2TS Block Protect Register (FLBPR)
For More Information On This Product,
$FFF0
Bit 7
R
R
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= Reserved
TST
R
6
present on the IRQ pin. The presence of V
Memory
R
5
Unaffected by reset
R
4
2.5.6 FLASH 2TS Block Protect
BPR3
3
BPR2
MC68HC908RF2 — Rev. 4.0
2
BPR1
TST
1
on the IRQ
MOTOROLA
BPR0
Bit 0