R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1209

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

24.3.1
The CMDR registers are six 8-bit registers. A command is written to CMDR as shown in table
24.4, and the command is transmitted when the CMDSTART bit in CMDSTRT is set to 1. Each
command is transmitted in order form the MSB (bit 7) in CMDR0 to the LSB (bit 0) in CMDR5.
Table 24.4 CMDR Configuration
(1)
Register
CMDR0 to
CMDR4
CMDR5
Bit
7 to 0
CMDR0 to CMDR4
Command Registers 0 to 5 (CMDR0 to CMDR5)
Bit Name
—
Contents
Command argument
CRC and End bit
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
7
0
R/W
R/W
R/W
6
0
Operation
Write command arguments.
Setting of CRC is unnecessary (automatic calculation).
End bit is fixed to 1 and its setting is unnecessary
(automatic setting).
The read value is 0.
Description
Command arguments
See specifications for the MMC card.
Data is sequentially transmitted from CMDR0 MSB to
CMDR5 LSB.
R/W
5
0
(command argument)
R/W
4
0
R/W
3
0
Rev.1.00 Jan. 10, 2008 Page 1177 of 1658
R/W
2
0
24. Multimedia Card Interface (MMCIF)
R/W
1
0
R/W
0
0
REJ09B0261-0100