R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 455

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11. Local Bus State Controller (LBSC)
(2)
I/O Card Interface Timing
Figures 11.19 and 11.20 show the timing for the PCMCIA I/O card interface.
When a PCMCIA card is accessed as the I/O card interface, dynamic sizing with the I/O bus width
can be performed using the IOIS16 pin. With the 16-bit bus width selected, if the IOIS16 signal is
high during the word-size I/O bus cycle, the I/O port is recognized as eight bits in bus width. In
this case, a data access for only eight bits is performed in the I/O bus cycle being executed, and
this is automatically followed by a data access for the remaining eight bits. Dynamic bus sizing is
also performed for byte-size access to address 2n + 1.
Figure 11.21 shows the basic timing for dynamic bus sizing.
Rev.1.00 Jan. 10, 2008 Page 423 of 1658
REJ09B0261-0100

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