R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 878

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 846 of 1658
REJ09B0261-0100
Bit
24
23 to 20 ⎯
19
18
17
16
15
Bit Name
CSPM
DIL
VSL
HSL
DDIS
CDEL
Initial
Value
0
All 0
0
0
0
0
0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Internal
Update
*
⎯
*
*
*
*
*
Description
CSYNC Pin Mode
Settings in DSYSR are given priority over
settings in this register.
0: CSYNC signal is output to the HSYNC pin
1: HSYNC signal is output to the HSYNC pin
Reserved
These bits are always read as 0. The write value
should always be 0.
DISP Polarity Select
0: DISP signal at high level during display
1: DISP signal at low level during display interval
VSYNC Polarity Select
0: VSYNC signal is low-active
1: VSYNC signal is high-active
HSYNC Polarity Select
0: HSYNC signal is low-active
1: HSYNC signal is high-active
DISP Output Disable
0: DISP signal is output
1: DISP signal is not output (fixed to low level)
CDE Polarity Select
0: CDE signal is high when output display data
1: CDE signal is low when output display data
interval
and the color detection register (CDER)
match, and is low when they do not match
and CDER match, and is high when they do
not match