R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1393

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
27.3.11 Data FIFO Register (FLDTFIFO)
FLDTFIFO is used to read from or write to the data FIFO area.
The read and write directions specified by the SELRW bit in FLCMDCR must match the read or
write access directions specified in this register.
Initial value:
Initial value:
Bit
31 to 24
23 to 16
15 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Bit Name
DTFO[31:24] ⎯
DTFO[23:16] ⎯
DTFO[15:8]
DTFO[7:0]
R/W
R/W
31
15
R/W
R/W
30
14
R/W
R/W
29
13
Initial
Value
DTFO[31:24]
R/W
R/W
DTFO[15:8]
28
12
R/W
R/W
R/W
R/W
R/W
R/W
R/W
27
11
R/W
R/W
26
10
Description
First Data
Specify the first data to be input or output via the FD7 to
FD0 pins.
In writing: Specify write data
In reading: Store read data
Second Data
Specify the second data to be input or output via the FD7
to FD0 pins.
In writing: Specify write data
In reading: Store read data
Third Data
Specify the third data to be input or output via the FD7 to
FD0 pins.
In writing: Specify write data
In reading: Store read data
Fourth Data
Specify the fourth data to be input or output via the FD7
to FD0 pins.
In writing: Specify write data
In reading: Store read data
R/W
R/W
25
9
R/W
R/W
24
8
R/W
R/W
23
7
27. NAND Flash Memory Controller (FLCTL)
Rev.1.00 Jan. 10, 2008 Page 1361 of 1658
R/W
R/W
22
6
R/W
R/W
21
5
DTFO[23:16]
R/W
R/W
DTFO[7:0]
20
4
R/W
R/W
19
3
REJ09B0261-0100
R/W
R/W
18
2
R/W
R/W
17
1
R/W
R/W
16
0

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