IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 279

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Figure 7–6. PCI-Avalon Bridge Block Diagram Managing the PCI Host-Bridge Device Mode
Altera Corporation
January 2011
Master/
Master/
Master/
Device
Device
Device
Target
Target
Target
PCI
PCI
PCI
PCI
Bus
MegaCore
Function
Arbiter
PCI
Bus
PCI
You can customize the PCI Host-Bridge Device mode by specifying a
performance profile. The PCI Host-Bridge Device mode performance
profiles are the same as the PCI Master/Target Peripheral mode.
Performance Profiles
The performance profiles are designed to provide trade-offs between
performance and resource usage, which also provides a deeper level of
system control. Therefore, you are able to customize system features to
suit application requirements. For example, if you need a target-only PCI
system component for a low bandwidth and low latency application,
specify that the targeted Altera device operate in the PCI Target-Only
Peripheral mode and use the Single-Cycle Transfers Only performance
profile.
The PCI-Avalon bridge provides the ability to modify the PCI master and
target performances independently. The PCI target performance setting
applies to all PCI device operating modes, while the PCI master
performance setting applies only to the PCI Master/Target Peripheral
and PCI Host-Bridge Device operating modes.
Controller
Controller
Master
Target
PCI
PCI
PCI Compiler Version 10.1
PCI Host Bridge Mode
PCI-Avalon Bridge
Prefetchable
Prefetchable
Bridge Logic
Registers
Control
Master
Status
Bridge
Bridge
Logic
Logic
Non-
PCI
PCI
Register Access
Avalon Slave
Avalon Slave
Prefetchable
Prefetchable
PCI Bus
Control
Access
Avalon
Avalon
Master
Master
Non-
Interconnect
System
Fabric
Functional Description
Peripheral
Processor
Peripheral
Peripheral
Slave
Master
Slave
Host
7–11