IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 65

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Variation File
Parameters
Altera Corporation
January 2011
DEVICE_ID
CLASS_CODE
MAX_LATENCY (1)
MIN_GRANT (1)
REVISION_ID
SUBSYSTEM_ID
SUBSYSTEM_VEND_ID
Table 2–1. PCI MegaCore Function Parameters (Part 1 of 5)
Name
Hexadecimal
Hexadecimal
Hexadecimal
Hexadecimal
Hexadecimal
Hexadecimal
Hexadecimal
If you do not want to use the IP Toolbench Parameterize - PCI Compiler
wizard, you can specify Altera PCI MegaCore function parameters
directly in the hardware description language (HDL) or graphic design
files.
Format
Table 2–1
PCI Compiler Version 10.1
H"0004"
H"FF0000"
H"00"
H"00"
H"01"
H"0000"
H"0000"
provides parameter names and descriptions.
Default Value
Device ID register. This parameter is a
16-bit hexadecimal value that sets the
device ID register in the configuration
space. Any value can be entered for this
parameter.
Class code register. This parameter is a
24-bit hexadecimal value that sets the class
code register in the configuration space.
The value entered for this parameter must
be a valid PCI SIG-assigned class code
register value.
Maximum latency register. This parameter
is an 8-bit hexadecimal value that sets the
maximum latency register in the
configuration space. This parameter must
be set according to the guidelines in the PCI
specification.
Minimum grant register. This parameter is
an 8-bit hexadecimal value that sets the
minimum grant register in the PCI
configuration space. This parameter must
be set according to the guidelines in the PCI
specification.
Revision ID register. This parameter is an
8-bit hexadecimal value that sets the
revision ID register in the PCI configuration
space.
Subsystem ID register. This parameter is a
16-bit hexadecimal value that sets the
subsystem ID register in the PCI
configuration space. Any value can be
entered for this parameter.
Subsystem vendor ID register. This
parameter is a 16-bit hexadecimal value
that sets the subsystem vendor ID register
in the PCI configuration space. The value
for this parameter must be a valid PCI
SIG-assigned vendor ID number.
Description
Parameter Settings
2–7