ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 13

• Manufacturer Part Number: ISP1705AETTM
• Manufacturer: STEricsson

Specifications of ISP1705AETTM

• Lead Free Status / RoHS Status: Compliant

ISP1705_2
Product data sheet
8.7.3 SRP charge and discharge resistors
8.10 Power-On Reset (POR)
8.8 Port power control
8.9 Band gap reference voltage
The ISP1705 provides on-chip resistors for short-term charging and discharging of V
These are used by the B-device to request a session, prompting the A-device to restore
the V
previous session by setting the DISCHRG_VBUS register bit to logic 1 and waiting for
SESS_END to be logic 1. Then the B-device charges V
register bit to logic 1. The A-device sees that V
threshold and starts a session by turning on the V
For an OTG or host application, the ISP1705 uses the PSW_N pin to control the external
power switch for the V
power switch can be connected to the FAULT pin of the ISP1705 to indicate to the ULPI
link the V
When the FAULT pin is not used, connect it to GND.
The band gap circuit provides a stable internal voltage reference to bias the analog
circuitry. This band gap circuit requires an accurate external reference resistor. Connect a
12 k
An internal POR pulse is generated when REG1V8 rises above V
POR pulse will be generated whenever REG1V8 drops below V
t
To give a better view of the functionality,
internal POR starts with logic 0 at t0. At t1, the detector will see the passing of the trip
level so that a POR pulse is generated to reset all internal circuits. If REG1V8 dips from t2
to t3 for greater than t
is less than t
LOW.
w(REG1V8_L)
Fig 4.
BUS
1 % resistor between the RREF pin and GND.
BUS
voltage. First, the B-device makes sure that V
Digital overcurrent detection scheme
.
w(REG1V8_L)
overcurrent status. For the connection scheme, see
ISP1705
w(REG1V8_L)
Rev. 02 — 21 January 2009
BUS
, the internal POR pulse will not be generated and will remain
5 V supply. The overcurrent detector output of the external
PSW_N
FAULT
V
BUS
, another POR pulse is generated. If the dip from t4 to t5
Figure 5
BUS
shows a possible curve of REG1V8. The
BUS
INDICATOR
SWITCH
is charged above the session valid
POWER
FAULT
+5 V
WITH
voltage.
BUS
BUS
ULPI Hi-Speed USB transceiver
is fully discharged from the
by setting the CHRG_VBUS
POR(trip)
001aai189
POR(trip)
Figure
V
© ST-NXP Wireless 2009. All rights reserved.
BUS
for more than
ISP1705
4.
. The internal
12 of 89
BUS
.