ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 62

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ISP1705AETTM

Manufacturer Part Number
ISP1705AETTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1705AETTM

Lead Free Status / RoHS Status
Compliant

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Table 47.
ISP1705_2
Product data sheet
Bit
Symbol
Reset
Access
CARKIT_CTRL - Carkit control register (address R = 19h to 1Bh, W = 19h, S = 1Ah, C = 1Bh) bit allocation
11.13 SCRATCH register
11.14 CARKIT_CTRL register
R/W/S/C
7
0
This is a 1-byte empty register for testing purposes, see
Table 46.
This register controls transparent UART mode. This register is only valid when the
CARKIT_MODE bit in the INTF_CTRL register (see
UART mode, set the CARKIT_MODE bit, and then set the TXD_EN and RXD_EN bits.
After entering UART mode, the ULPI interface is not available. When exiting UART mode,
assert the STP pin or perform a hardware reset using chip select.
For bit allocation, see
Table 48.
Bit
7 to 0
Bit
7 to 4
3
2
1 to 0
R/W/S/C
6
0
Symbol
SCRATCH[7:0]
reserved
Symbol
-
RXD_EN
TXD_EN
-
SCRATCH - Scratch register (address R = 16h to 18h, W = 16h, S = 17h, C = 18h)
bit description
CARKIT_CTRL - Carkit control register (address R = 19h to 1Bh, W = 19h,
S = 1Ah, C = 1Bh) bit description
R/W/S/C
5
0
Rev. 02 — 21 January 2009
Table
Access
R/W/S/C
Description
reserved; the link must never write logic 1 to these bits
RXD enable: Routes the UART RXD signal from the DP pin to the
DATA1 pin. This bit will automatically be cleared when UART mode is
exited.
TXD enable: Routes the UART TXD signal from the DATA0 pin to the
DM pin. This bit will automatically be cleared when UART mode is
exited.
reserved; the link must never write logic 1 to these bits
47.
R/W/S/C
4
0
Value
00h
RXD_EN
R/W/S/C
Description
Scratch: This is an empty register byte for testing
purposes. Software can read, write, set and clear
this register. The functionality of the PHY will not be
affected.
3
0
Section
TXD_EN
R/W/S/C
ULPI Hi-Speed USB transceiver
Table
2
0
11.6) is set. When entering
46.
R/W/S/C
© ST-NXP Wireless 2009. All rights reserved.
1
0
ISP1705
reserved
R/W/S/C
0
0
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