APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 14

• Manufacturer Part Number: APA600-CQ208B
• Description: FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
• Manufacturer: Actel

Specifications of APA600-CQ208B

• Package: 208CQFP
• Family Name: ProASICPLUS
• Device System Gates: 600000
• Number Of Registers: 21504
• Maximum Internal Frequency: 180 MHz
• Typical Operating Supply Voltage: 2.5 V
• Maximum Number Of User I/os: 158
• Ram Bits: 129024
• Re-programmability Support: Yes

Note: This figure shows routing for only one global path.
Figure 2-4 • High-Performance Global Network
Table 2-1 •
2 -4
Global Clock Networks (Trees)
Clock Spines/Tree
Total Spines
Top or Bottom Spine Height (Tiles)
Tiles in Each Top or Bottom Spine
Total Tiles
ProASIC
Bottom Spine
PLUS
Top Spine
Clock Spines
Global
Pads
Flash Family FPGAs
PAD RING
APA075
3,072
512
24
16
4
6
APA150
PAD RING
6,144
768
32
24
4
8
v5.9
APA300
1,024
8,192
32
32
4
8
APA450
12,288
1,024
12
48
32
4
High-Performance
Global Network
APA600
21,504
1,536
14
56
48
4
Global Networks
Global
Pads
Global Spine
Global Ribs
Scope of Spine
(Shaded area
plus local RAMs
and I/Os)
APA750
32,768
2,048
16
64
64
4
APA1000
56,320
2,560
22
88
80
4