APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 82

no-image

APA600-CQ208B

Manufacturer Part Number
APA600-CQ208B
Description
FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
Manufacturer
Actel
Datasheet

Specifications of APA600-CQ208B

Package
208CQFP
Family Name
ProASICPLUS
Device System Gates
600000
Number Of Registers
21504
Maximum Internal Frequency
180 MHz
Typical Operating Supply Voltage
2.5 V
Maximum Number Of User I/os
158
Ram Bits
129024
Re-programmability Support
Yes
FIFO Reset
Notes:
1. During reset, either the enables (WRB and RBD) OR the clocks (WCLKS and RCKLS) must be low.
2. The plot shows the normal operation status.
Figure 2-45 • FIFO Reset
Table 2-68 • T
2 -7 2
Symbol t
CBRSH
CBRSS
ERSA
FRSA
RSL
THRSA
WBRSH
WBRSS
Note: During rest, the enables (WRB and RBD) must be high OR the clocks (WCLKS and RCKLS) must be low.
ProASIC
1
1
1
1
PLUS
xxx
T
J
J
Flash Family FPGAs
= 0°C to 110°C; V
= –55°C to 150°C, V
WCLKS or RCLKS ↑ hold from RESETB ↑
WCLKS or RCLKS ↓ setup to RESETB ↑
New EMPTY ↑ access from RESETB ↓
FULL ↓ access from RESETB ↓
RESETB low phase
EQTH or GETH access from RESETB ↓
WB ↓ hold from RESETB ↑
WB ↑ setup to RESETB ↑
WCLKS, RCLKS
EQTH, GETH
t ERSA , t FRSA
WRB/RBD
RESETB
DD
EMPTY
Description
t THRSA
FULL
DD
= 2.3 V to 2.7 V for Commercial/Industrial
1
1
= 2.3 V to 2.7 V for Military/MIL-STD-883
t CBRSS
v5.9
t RSL
Min.
1.5
1.5
3.0
3.0
7.5
4.5
1.5
1.5
Max.
t WBRSS
Units
ns
ns
ns
ns
ns
ns
ns
ns
t WBRSH
Cycle Start
Cycle Start
t CBRSH
Synchronous mode only
Synchronous mode only
Asynchronous mode only
Asynchronous mode only
Notes

Related parts for APA600-CQ208B