APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 36
APA600-CQ208B
Manufacturer Part Number
APA600-CQ208B
Description
FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA600-CQ208B
Package
208CQFP
Family Name
ProASICPLUS
Device System Gates
600000
Number Of Registers
21504
Maximum Internal Frequency
180 MHz
Typical Operating Supply Voltage
2.5 V
Maximum Number Of User I/os
158
Ram Bits
129024
Re-programmability Support
Yes
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Related Documents
Application Notes
Efficient Use of ProASIC Clock Trees
http://www.actel.com/documents/A500K_Clocktree_AN.pdf
I/O Features in ProASIC
http://www.actel.com/documents/APA_LVPECL_AN.pdf
Power-Up Behavior of ProASIC
http://www.actel.com/documents/APA_PowerUp_AN.pdf
ProASIC
http://www.actel.com/documents/APA_PLLdynamic_AN.pdf
Using ProASIC
http://www.actel.com/documents/APA_PLL_AN.pdf
In-System Programming ProASIC
http://www.actel.com/documents/APA_External_ISP_AN.pdf
Performing Internal In-System Programming Using Actel’s ProASIC
http://www.actel.com/documents/APA_Microprocessor_AN.pdf
ProASIC
http://www.actel.com/documents/APA_RAM_FIFO_AN.pdf
White Paper
Design Security in Nonvolatile Flash and Antifuse FPGAs
http://www.actel.com/documents/DesignSecurity_WP.pdf
User’s Guides
Designer User’s Guide
http://www.actel.com/documents/designer_UG.pdf
SmartGen Cores Reference Guide
http://www.actel.com/documents/gen_refguide_ug.pdf
ProASIC and ProASIC
http://www.actel.com/documents/pa_libguide_UG.pdf
Additional Information
The following link contains additional information on ProASIC
http://www.actel.com/products/proasicplus/default.aspx
2 -2 6
ProASIC
PLUS
PLUS
PLUS
PLL Dynamic Reconfiguration Using JTAG
RAM and FIFO Blocks
PLUS
Flash Family FPGAs
Clock Conditioning Circuits
PLUS
PLUS
Macro Library Guide
Flash FPGAs
PLUS
PLUS
Devices
Devices
v5.9
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PLUS
devices.
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