APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 50

• Manufacturer Part Number: APA600-CQ208B
• Description: FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
• Manufacturer: Actel

Specifications of APA600-CQ208B

• Package: 208CQFP
• Family Name: ProASICPLUS
• Device System Gates: 600000
• Number Of Registers: 21504
• Maximum Internal Frequency: 180 MHz
• Typical Operating Supply Voltage: 2.5 V
• Maximum Number Of User I/os: 158
• Ram Bits: 129024
• Re-programmability Support: Yes

Table 2-25 • DC Specifications (3.3 V PCI Operation)
2 -4 0
Symbol
V
V
V
V
I
I
V
V
C
C
Notes:
1. For PCI operation, use GL33, OTB33PH, OB33PH, IOB33PH, IB33, or IB33S macro library cell only.
2. All process conditions. Junction Temperature: –40 to +110°C for Commercial and Industrial devices and –55 to +125°C for Military.
3. This specification is guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a floated
4. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
IPU
IL
DD
DDP
IH
IL
OH
OL
IN
CLK
ProASIC
network. Designers with applications sensitive to static power utilization should ensure that the input buffer is conducting minimum
current at this input voltage.
PLUS
Parameter
Supply Voltage for Core
Supply Voltage for I/O Ring
Input High Voltage
Input Low Voltage
Input Pull-up Voltage
Input Leakage Current
Output High Voltage
Output Low Voltage
Input Pin Capacitance (except CLK)
CLK Pin Capacitance
Flash Family FPGAs
3
4
Condition
0 < V
I
I
OUT
OUT
= –500 µA
= 1500 µA
IN
< V
1
DDP
v5.9
Std.
0.5V
0.7V
0.9V
Min.
–0.5
–10
Commercial/
2.3
3.0
5
Industrial
DDP
DDP
DDP
V
DDP
0.3V
0.1V
Max.
2.7
3.6
10
10
12
2
+ 0.5
DDP
DDP
Military/MIL-STD- 883
0.5V
0.7V
0.9V
Min.
–0.5
–50
3.0
2.3
5
DDP
DDP
DDP
V
0.3V
0.1V
DDP
Max.
2.7
3.6
50
10
12
+ 0.5
DDP
DDP
2
Units
μA
pF
pF
V
V
V
V
V
V
V