LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 13

The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel

LPC2917_19_01

Manufacturer Part Number
LPC2917_19_01
Description
The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2917_19_01_3
Product data sheet
6.3 On-chip flash memory system
6.4 On-chip static RAM
THUMB code can provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM controller connected to a 16-bit memory system.
The ARM968E-S processor is described in detail in the ARM968E-S data sheet
The LPC2917/2919/01 includes a 512 kB or 768 kB flash memory system. This memory
can be used for both code and data storage. Programming of the flash memory can be
accomplished via the flash memory controller or JTAG.
The flash controller also supports a 16 kB, byte-accessible on-chip EEPROM integrated
on the LPC2917/2919/01.
In addition to the two 16 kB TCMs the LPC2917/2919/01 includes two static RAM
memories: one of 32 kB and one of 16 kB. Both may be used for code and/or data
storage.
In addition, 8 kB SRAM for the ETB can be used as static memory for code and data
storage. However, DMA access to this memory region is not supported.
Rev. 03 — 9 December 2009
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
© NXP B.V. 2009. All rights reserved.
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