LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 19

• Manufacturer Part Number: LPC2917_19_01
• Description: The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2917_19_01_3
Product data sheet
Table 7.
[1]
[2]
[3]
[4]
Table 8.
Base clock
BASE_MSCSS_CLK
BASE_UART_CLK
BASE_ICLK0_CLK
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
reserved
BASE_ICLK1_CLK
Base clock
BASE_OUT_CLK
This clock is always on (cannot be switched off for system safety reasons)
In the peripheral subsystem parts of the Timers, watchdog timer, SPI and UART have their own clock
source. See
In the Power Clock and Reset Control subsystem parts of the CGU, RGU, and PMU have their own clock
source. See
The clock should remain activated when system wake-up on timer or UART is required.
CGU0 generated base clock and branch clock overview
CGU1 base clock and branch clock overview
Section 6.12
Section 6.15
Rev. 03 — 9 December 2009
for details.
for details.
Branch clock name
CLK_MSCSS_APB
CLK_MSCSS_MTMR0
CLK_MSCSS_MTMR1
CLK_MSCSS_PWM0
CLK_MSCSS_PWM1
CLK_MSCSS_PWM2
CLK_MSCSS_PWM3
CLK_MSCSS_ADC1_APB APB side of ADC 1
CLK_MSCSS_ADC2_APB APB side of ADC 2
CLK_MSCSS_QEI
CLK_UART1
-
CLK_SPI0
CLK_SPI1
CLK_SPI2
CLK_TMR1
CLK_TMR2
CLK_TMR3
CLK_ADC1
CLK_ADC2
-
-
Branch clock name
CLK_OUT_CLK
CLK_UART0
CLK_TMR0
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
Parts of the device clocked
by this branch clock
APB side of the MSCSS
Timer 0 in the MSCSS
Timer 1 in the MSCSS
PWM 0
PWM 1
PWM 2
PWM 3
Quadrature encoder
UART 0 interface clock
UART 1 interface clock
CGU1 input clock
SPI 0 interface clock
SPI 1 interface clock
SPI 2 interface clock
Timer 0 clock for counter part
Timer 1 clock for counter part
Timer 2 clock for counter part
Timer 3 clock for counter part
Control of ADC 1, capture
sample result
Control of ADC 2, capture
sample result
-
CGU1 input clock
Parts of the device clocked by this
branch clock
clockout pin
…continued
© NXP B.V. 2009. All rights reserved.
Remark
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