LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 28

• Manufacturer Part Number: LPC2917_19_01
• Description: The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2917_19_01_3
Product data sheet
6.11.4.1 Pin description
6.12.1 Peripheral subsystem clock description
6.12.2 Watchdog timer
6.12 Peripheral subsystem
The vectored interrupt-controller inputs are active HIGH.
The event router module in the LPC2917/2919/01 is connected to the pins listed below.
The pins are combined with other functions on the port pins of the LPC2917/2919/01.
Table 14
position in the event-router registers and the default polarity.
Table 14.
The peripheral subsystem is clocked by a number of different clocks:
The purpose of the watchdog timer is to reset the ARM9 processor within a reasonable
amount of time if the processor enters an error state. The watchdog generates a system
reset if the user program fails to trigger it correctly within a predetermined amount of time.
Key features:
Symbol
EXTINT 7 - 0
CAN0 RXD
CAN1 RXD
I2C0_SCL
I2C1_SCL
LIN0 RXD
LIN1 RXD
SPI0 SDI
SPI1 SDI
SPI2 SDI
UART0 RXD
UART1 RXD
-
-
-
•
•
•
•
•
•
•
CLK_SYS_PESS
CLK_UART0/1
CLK_SPI0/1/2
CLK_TMR0/1/2/3
CLK_SAFE see
Internal chip reset if not periodically triggered
Timer counter register runs on always-on safe clock
shows the pins connected to the event router, and also the corresponding bit
Event-router pin connections
Direction
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
na
na
na
Section 6.7.2
Rev. 03 — 9 December 2009
Description
CAN0 receive data input wake-up
CAN1 receive data input wake-up
I2C0 SCL clock input
I2C1 SCL clock input
LIN0 receive data input wake-up
LIN1 receive data input wake-up
SPI0 receive data input
SPI1 receive data input
SPI2 receive data input
UART0 receive data input
UART1 receive data input
CAN interrupt (internal)
VIC FIQ (internal)
VIC IRQ (internal)
external interrupt input 7 - 0
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
© NXP B.V. 2009. All rights reserved.
Default polarity
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
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