LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 38
LPC2917_19_01
Manufacturer Part Number
LPC2917_19_01
Description
The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2917_19_01.pdf
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LPC2917_19_01_3
Product data sheet
Fig 8.
PAUSE
Modulation and Sampling Control Subsystem (MSCSS) block diagram
capture
capture
TIMER1
TIMER0
MSCSS
MSCSS
QEI
PWM0 TRAP
PWM0 CAP[2:0]
carrier
carrier
carrier
carrier
AHB-TO-APB BRIDGE
Rev. 03 — 9 December 2009
start
PWM1 TRAP
PWM1 CAP[2:0]
MSCSS
start
PWM0
start
ADC1
PWM2 TRAP
PWM2 CAP[2:0]
PWM1
synch
ADC2
LPC2917/01; LPC2919/01
PWM3 TRAP
PWM3 CAP[2:0]
synch
PWM2
ARM9 microcontroller with CAN and LIN
synch
PWM3
ADC1 EXT START
IDX0
PHA0
PHB0
ADC1 IN[7:0]
ADC2 EXT START
ADC2 IN[7:0]
PWM0 MAT[5:0]
PWM1 MAT[5:0]
PWM2 MAT[5:0]
PWM3 MAT[5:0]
© NXP B.V. 2009. All rights reserved.
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