LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 77
LPC2917_19_01
Manufacturer Part Number
LPC2917_19_01
Description
The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2917_19_01.pdf
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NXP Semiconductors
LPC2917_19_01_3
Product data sheet
10.3 XIN_OSC input
10.4 XIN_OSC Printed Circuit Board (PCB) layout guidelines
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
capacitor to ground C
mode, a minimum of 200 mV
manual UM10316.
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C
case of third overtone crystal usage, have a common ground plane. The external
components must also be connected to the ground plain. Loops must be made as small
as possible, in order to keep the noise coupled in via the PCB as small as possible. Also
parasitics should stay as small as possible. Values of C
smaller accordingly to the increase in parasitics of the PCB layout.
Fig 33. Slave mode operation of the on-chip oscillator
i
= 100 pF. To limit the input voltage to the specified range, choose an additional
g
Rev. 03 — 9 December 2009
which attenuates the input voltage by a factor C
rms
is needed. For more details see the LPC29xx User
LPC2917/01; LPC2919/01
XIN_OSC
C i
100 pF
LPC29xx
ARM9 microcontroller with CAN and LIN
002aae730
C g
x1
and C
x2
x1
should be chosen
and C
i
/(C
© NXP B.V. 2009. All rights reserved.
x2
i
, and C
+ C
g
). In slave
x3
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