LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 25

• Manufacturer Part Number: LPC2917_19_01
• Description: The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2917_19_01_3
Product data sheet
A timing diagram for writing to external memory is shown In
between wait-state settings is indicated with arrows.
Fig 5.
Fig 6.
(1) BLS has the same timing as WE in configurations that use the byte lane enable signals to connect
WSTOEN = 3, WST1 = 6
Reading from external memory
WSTWEN = 3, WST2 = 7
to write enable (8 bit devices).
Writing to external memory
WE/BLS
CLK(SYS)
CLK(SYS)
BLS
CS
OE
CS
(1)
Rev. 03 — 9 December 2009
D
A
D
A
LPC2917/01; LPC2919/01
WSTOEN
WSTWEN
ARM9 microcontroller with CAN and LIN
WST1
WST2
Figure
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6. The relationship
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© NXP B.V. 2009. All rights reserved.
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