LPC2917_19_01 NXP Semiconductors, LPC2917_19_01 Datasheet - Page 39

The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel

LPC2917_19_01

Manufacturer Part Number
LPC2917_19_01
Description
The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial andparallel
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2917_19_01_3
Product data sheet
6.14.2 Pin description
6.14.3 Clock description
6.14.4 Analog-to-digital converter
The pins of the LPC2917/2919/01 MSCSS associated with the two ADC modules are
described in
Section
Section
Section
The MSCSS is clocked from a number of different sources:
Each ADC has two clock areas; a APB part clocked by CLK_MSCSS_ADCx_APB (x = 1
or 2) and a control part for the analog section clocked by CLK_ADCx = 1 or 2), see
Section
All clocks are derived from the BASE_MSCSS_CLK, except for CLK_SYS_MSCSS_A
which is derived form BASE_SYS_CLK, and the CLK_ADCx clocks which are derived
from BASE_CLK_ADC. If specific PWM or ADC modules are not used their corresponding
clocks can be switched off.
The MSCSS in the LPC2917/2919/01 includes two 10-bit successive-approximation
analog-to-digital converters.
The key features of the ADC interface module are:
CLK_SYS_MSCSS_A clocks the AHB side of the AHB-to-APB bus bridge
CLK_MSCSS_APB clocks the subsystem APB bus
CLK_MSCSS_MTMR0/1 clocks the timers
CLK_MSCSS_PWM0..3 clocks the PWMs.
ADC1 and ADC2: Eight analog inputs; time-multiplexed; measurement range up to
3.3 V
External reference-level inputs
400 ksamples per second at 10-bit resolution up to 1500 ksamples per second at 2-bit
resolution
Programmable resolution from 2-bit to 10-bit
Single analog-to-digital conversion scan mode and continuous analog-to-digital
conversion scan mode
Optional conversion on transition on external start input, timer capture/match signal,
PWM_sync or ‘previous’ ADC
Converted digital values are stored in a register for each channel
Optional compare condition to generate a ‘less than’ or an ‘equal to or greater than’
compare-value indication for each channel
Power-down mode
6.14.5.4, pins directly connected to the MSCSS timer 1 module are described in
6.14.6.1, and pins connected to the quadrature encoder interface are described in
6.14.7.1.
6.7.2.
Section
6.14.4.2. Pins connected to the four PWM modules are described in
Rev. 03 — 9 December 2009
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
© NXP B.V. 2009. All rights reserved.
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