M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 100

• Manufacturer Part Number: M30240ECFP
• Description: M30240 Group Specification
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 1.89: Typical transmit timings in UART mode
• Example of transmit timing when transfer data is 8 bits long (parity enabled, one stop bit)
• Example of receive timing when transfer data is 8 bits long (parity enabled, one stop bit)
Transfer clock
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
CTSi
TxDi
Transmit register
empty flag (TXEPT)
Transmit interrupt
request bit (IR)
Transfer clock
Transmit buffer
empty flag(TI)
Transmit enable
bit(TE)
TxDi
Transmit register
empty flag (TXEPT)
Transmit interrupt
request bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
Shown in ( ) are bit symbols.
• Parity is enabled.
• One stop bit.
• CTS function is selected.
• Transmit interrupt cause select bit = “1”.
The above timing applies to the following settings :
• Parity is disabled.
• Two stop bits.
• CTS function is disabled.
• Transmit interrupt cause select bit = “0”.
“H”
“1”
“0”
“1”
“0”
“L”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Start
Start
ST
ST
Data is set in UARTi transmit buffer register
bit
bit
Cleared to “0” when interrupt request is accepted, or cleared by software
D
D
Data is set in UARTi transmit buffer register.
0
0
D
D
1
1
Tc
D
D
2
2
D
D
3
3
Tc
D
D
4
4
The transfer clock stops momentarily as CTS is “H” when the stop bit is checked.
The transfer clock starts as the transfer starts immediately CTS changes to “L”.
Transferred from UARTi transmit buffer register to UARTi transmit register
D
D
5
5
D
D
6
6
Transferred from UARTi transmit buffer register to UARTi transmit register
D
D
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
Parity
1-100
7
7
bit
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D
P
fi : frequency of BRGi count source (f
f
n : value set to BRGi
8
EXT
Stop
Cleared to “0” when interrupt request is accepted, or cleared by software
bit
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
SP
Stop
SP
bit
: frequency of BRGi count source (external clock)
SP
fi : frequency of BRGi count source (f
f
n : value set to BRGi
EXT
Stop
ST
bit
ST
: frequency of BRGi count source (external clock)
D
D
0
0
D
D
1
1
D
D
2
2
Stopped pulsing because transmit enable bit = “0”
D
D
3
EXT
3
D
D
4
4
D
D
5
EXT
5
1
D
, f
Mitsubishi microcomputers
D
6
8
6
, f
D
M30240 Group
D
7
32
1
7
)
, f
P
D
8
8
, f
SP
32
SPSP
)
ST
ST
D
0
D
D
0
1
D
1