M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 91

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M30240ECFP

Manufacturer Part Number
M30240ECFP
Description
M30240 Group Specification
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
UART0 through UART2
Table 1.24:
Note 1: “n” denotes the value 00
Note 2: Maximum 5 Mbps.
Note 3: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that the UARTi
Transfer data format
Transfer clock
Transmission/reception
control
Transmission start
condition
Reception start
condition
Error detection
2.23.1 Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Table 1.24
and Table 1.25 list the specifications of the clock synchronous serial I/O mode. Figure 1.82 shows the
UARTi transmit/receive mode register.
receive interrupt request bit is not set to “1”.
Item
Specifications of clock synchronous serial I/O mode (1)
• Transfer data length: 8 bits
• When internal clock is selected (bit 3 at addresses 03A0
(Note 1)
• When external clock is selected (bit 3 at addresses 03A0
from CLKi pin (Note 2)
• CTS function/RTS function/CTS, RTS function chosen to be invalid
• To start transmission, the following requirements must be met:
_ Transmit enable bit (bit 0 at addresses 03A5
_ Transmit buffer empty flag (bit 1 at addresses 03A5
_ When CTS function selected, CTS input level = “L”
• Furthermore, if external clock is selected, the following requirements must also be met:
_ CLKi polarity select bit (bit 6 at addresses 03A4
CLKi input level = “H”
_ CLKi polarity select bit (bit 6 at addresses 03A4
CLKi input level = “L”
• To start reception, the following requirements must be met:
_ Receive enable bit (bit 2 at addresses 03A5
_ Transmit enable bit (bit 0 at addresses 03A5
_ Transmit buffer empty flag (bit 1 at addresses 03A5
• Furthermore, if external clock is selected, the following requirements must
also be met:
_ CLKi polarity select bit (bit 6 at addresses 03A4
CLKi input level = “H”
_ CLKi polarity select bit (bit 6 at addresses 03A4
CLKi input level = “L”
• When transmitting
_ Transmit interrupt cause select bit (bits 0, 1 at address 03B0
address 037D
_ Transmit interrupt cause select bit (bits 0, 1 at address 03B0
address 037D
• Overrun error (Note 3)
This error occurs when the next data is ready before contents of UARTi receive buffer is read.
16
to FF
fi = f1, f8, f32
16
16
16
that is set to the UART bit rate generator.
) = “0”: Interrupts requested when data transfer from UARTi
) = “1”: Interrupts requested when data transmission from
1-91
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specification
16
16
16
, 03AD
, 03AD
, 03AD
16
16
16
16
, 03AC
, 03AC
, 03AC
, 03AC
16
16
16
16
16
, 03AD
, 03AD
16
, 037D
, 037D
, 037D
Mitsubishi microcomputers
, 03A8
16
16
16
16
16
M30240 Group
, 03A8
, 037C
, 037C
, 037C
, 037C
16
16
16
16
16
16
16)
, 037D
, 037D
, bit 4 at
, bit 4 at
16
) = “1”
) = “1”
, 0378
16
= “1”
16
16
16
16
, 0378
) = “0”:
) = “1”:
) = “0”:
) = “1”:
16
16
) = “0”
) = “0”
16
16
= “0”): fi=2(n+1)
= “1”): Input

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