M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 96
M30240ECFP
Manufacturer Part Number
M30240ECFP
Description
M30240 Group Specification
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30240ECFP.pdf
(142 pages)
- Current page: 96 of 142
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Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 1.86: The transfer clock output from the multiple pins function usage
Figure 1.87: Serial data logic switch timing
2.23.1.3 Transfer clock output from multiple pins function (UART1)
2.23.1.4 Continuous receive mode
2.23.1.5 Serial data logic switch function (UART2)
This function allows the setting two transfer clock output pins and choosing one of the two to output a clock
by using the CLK and CLKS select bit (bits 4 and 5 at address 03B0
function is valid only when the internal clock is selected for UART1. Note that when this function is selected,
UART1 CTS/RTS function cannot be used.
If the continuous receive mode enable bit (bits 2 and 3 at address 03B0
“1”, the unit is placed in continuous receive mode. In this mode, when the receive buffer register is read out,
the unit simultaneously goes to a receive enable state without having to set dummy data to the transmit buffer
register back again.
When the data logic select bit (bit6 at address 037D
from receive buffer register, data is reversed. Figure 1.87 shows the example of serial data logic switch timing.
•When LSB first
Transfer clock
(no reverse)
Note: This applies when the internal clock is selected and transmission
(reverse)
Microcomputer
TxD
TxD
is performed only in clock synchronous serial I/O mode.
CLKS
2
2
CLK
T
X
“H”
“H”
“H”
“L”
“L”
“L”
D
1
1
1
(P6
(P6
(P6
7
4
5
)
)
)
D0
D0
D1
D1
1-96
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D2
D2
IN
CLK
16
D3
D3
) = “1”, and writing to transmit buffer register or reading
D4
D4
D5
D5
16
). See Figure 1.86. The multiple pins
16
D6
D6
, bit 5 at address 037D
Mitsubishi microcomputers
M30240 Group
D7
D7
IN
CLK
16
) is set to
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