M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 103

• Manufacturer Part Number: M30240ECFP
• Description: M30240 Group Specification
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
UART0 through UART2
Table 1.30:
Note 1: ‘n’ denotes the value 00
Note 2: fEXT is input from the CLK2 pin.
Note 3: If an overrun error occurs, the UART2 receive buffer will have the next data written in. Note also that the UARTi
Transfer data
format
Transfer clock
Transmission /
reception control
Other settings
Transmission
start condition
Reception start
condition
Error detection
2.23.3 Clock-asynchronous serial I/O mode (compliant with the SIM interface)
The SIM interface is used for connecting the microcomputer with a memory card I/C or the like; adding
some extra settings in UART2 clock-asynchronous serial I/O mode allows the user to effect this func-
tion. Table 1.30 shows the specifications of clock-asynchronous serial I/O mode (compliant with the
SIM interface). Figure 1.93 shows the typical transmit/receive timing in UART mode.
Item
receive interrupt request bit is not set to “1”.
Specifications of clock-asynchronous serial I/O mode (compliant with the SIM interface)
• Transfer data 8-bit UART mode (bit 2 through bit 0 of address 0378
• One stop bit (bit 4 of address 0378
• With the direct format chosen
Set parity to “even” (bit 5 and bit 6 of address 0378
Set data logic to “direct” (bit 6 of address 037D
Set transfer format to LSB (bit 7 of address 037C
• With the inverse format chosen
Set parity to “odd” (bit 5 and bit 6 of address 0378
Set data logic to “inverse” (bit 6 of address 037D
Set transfer format to MSB (bit 7 of address 037C
• With the internal clock chosen (bit 3 of address 0378
• With an external clock chosen (bit 3 of address 0378
• Disable the CTS and RTS function (bit 4 of address 037C
• The sleep mode select function is not available for UART2
• Set transmission interrupt factor to “transmission completed” (bit 4 of address 037D
• To start transmission, the following requirements must be met:
- Transmit enable bit (bit 0 of address 037D
- Transmit buffer empty flag (bit 1 of address 037D
• To start reception, the following requirements must be met:
- Reception enable bit (bit 2 of address 037D
- Detection of a start bit
• When transmitting
When data transmission from the UART2 transfer register is completed (bit 4 of address 037D
“1”)
• When receiving
When data transfer from the UART2 receive register to the UART2 receive buffer register is
completed
• Overrun error (see the specifications of clock-asynchronous serial I/O) (Note 3)
• Framing error (see the specifications of clock-asynchronous serial I/O)
• Parity error (see the specifications of clock-asynchronous serial I/O)
- On the reception side, an “L” level is output from the TxD2 pin by use of the parity error signal
output function (bit 7 of address 037D
- On the transmission side, a parity error is detected by the level of input to the RxD2 pin when a
transmission interrupt occurs
• The error sum flag (see the specifications of clock-asynchronous serial I/O)
16
to FF
16
that is set to the UARTi bit rate generator.
1-103
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
16
= “0”)
= “1”) when a parity error is detected
Specification
16
16
) = “1”
16
) = “1”
16
16
= “0”).
16
16
16
16
= “1”)
= “0”).
) = “0”
= “1”)
= “0” and “1” respectively)
= “1” and “1” respectively)
16
16
= “0”): fi / 16 (n + 1) (Note 1): fi=f1, f8, f32
= “1”): fEXT / 16 (n+1) (Note 1) (Note 2)
16
= “1”)
Mitsubishi microcomputers
M30240 Group
16
= “1012”)
16
= “1”)
16
=