M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 106

• Manufacturer Part Number: M30240ECFP
• Description: M30240 Group Specification
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Specifications in this manual are tentative and subject to change
A-D Converter
2.24 A-D Converter
Table 1.31:
Method of A-D conversion
Analog input voltage (Note)
Operating clock fAD
Resolution
Absolute precision
Operating modes
Analog input pins
A-D conversion start condition
Conversion speed per pin
Note Does not depend on use of sample and hold function.
The A-D converter consists of one 10-bit successive approximation A-D converter circuit with a
capacitive coupling amplifier. Pins P100 to P107 function as the analog signal input pins. The direction
registers of these pins for A-D conversion must therefore be set to input. The Vref connect bit (bit 5 at
address 03D7
voltage input pin (VREF) when the A-D converter is not used. Doing so stops any current flowing into
the resistance ladder from VREF, reducing the power dissipation. When using the A-D converter, start
A-D conversion only after setting bit 5 of 03D7
The result of A-D conversion is stored in the A-D registers of the selected pins. When set to 10-bit
precision, the low 8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When
set to 8-bit precision, the low 8 bits are stored in the even addresses.
Table 1.31 shows the performance of the A-D converter. Figure 1.97 shows the block diagram of the A-
D converter, and Figure 1.98 and Figure 1.99 show the A-D converter-related registers.
Item
Performance of A-D Converter
16
) can be used to isolate the resistance ladder of the A-D converter from the reference
Successive approximation (capacitive coupling amplifier)
0V to AVCC (VCC)
VCC = 5V
8-bit or 10-bit (selectable)
VCC = 5V
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0, and
repeat sweep mode 1
8pins (AN0 to AN7)
•Software trigger
•External trigger (can be retriggered)
•Without sample and hold function
• With sample and hold function
A-D conversion starts when the A-D conversion start flag changes to “1”
A-D conversion starts when the A-D conversion start flag is “1” and the AD
input changes from “H” to “L”
8-bit resolution: 49 AD cycles, 10-bit resolution: 59 AD cycles
8-bit resolution: 28 AD cycles, 10-bit resolution: 33 AD cycles
fAD/divide-by-2 or fAD/divide-by-4 or fAD, fAD=f(Xin)
• Without sample and hold function
• With sample and hold function (8-bit resolution)
• With sample and hold function (10-bit resolution)
3LSB
2LSB
3LSB
1-106
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
to connect VREF.
Performance
Mitsubishi microcomputers
M30240 Group
TRG
/P87