M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 26

• Manufacturer Part Number: M30240ECFP
• Description: M30240 Group Specification
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

2.9 Stop Mode
Table 1.5:
2.10 Wait Mode
Table 1.6:
2.11 Status Transition Of the Internal Clock
Specifications in this manual are tentative and subject to change
Stop Mode
Port
CLKOUT
Port
CLKout
2.11.1 Division by 2 mode
Writing “1” to the all-clock stop control bit (bit 0 at address 0007
microcomputer enters stop mode. In stop mode, the content of the internal RAM is retained provided
that VCC remains above 2V.
Because the oscillation of internal clock
such as the A-D converter and watchdog timer do not function. However, timer A operates, provided that
the event counter mode is set to an external pulse, and UARTi (i = 0 to 2) functions provided an external
clock is selected. Table 1.5 shows the status of the ports in stop mode.
Stop mode is cancelled by a hardware reset or interrupt. If an interrupt is to be used to cancel stop mode,
that interrupt must first have been enabled. The I flag must also be set prior to stopping for an interrupt
to cancel it. After coming out of stop mode, it is recommended that five “NOP” instructions be executed
to clear the instruction queue.
When shifting to stop mode, the main clock division select bit 0 (bit 6 at 0006
When a WAIT instruction is executed, the internal clock
mode. In this mode, oscillation continues but the internal clock
to the WAIT peripheral function clock stop bit and executing a WAIT instruction stops the clock being
supplied to the internal peripheral functions, allowing power dissipation to be reduced. Table 1.6 shows
the status of the ports in wait mode.
Wait mode is cancelled by a hardware reset or interrupt. If an interrupt is used to cancel wait mode, the
microcomputer restarts using as internal clock
instruction was executed
Power dissipation can be reduced and low-voltage operation achieved by changing the count source for
internal clock
control registers 0 and 1.
After a reset, operation defaults to division by 8 mode. When shifting to stop mode, the main clock
division select bit 0 (bit 6 at address 0006
internal clock
The main clock is divided by 2 to obtain the internal clock .
Pin
Pin
Port status during stop mode
Port status during wait mode
. Table 1.7 shows the operating modes corresponding to the settings of system clock
Retains status before stop mode
Retains status before stop mode
Retains status before stop mode
Does not stop when the WAIT peripheral function clock stop bit is “0”
When the WAIT peripheral function clock stop bit is “1”, the status immediately
prior to entering wait mode is maintained.
Single-chip mode
16
, f1 to f32, and fAD stops in stop mode, peripheral functions
) is set to “1”. The following shows the operational modes of
Single-chip mode
1-26
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
the clock that had been selected when the WAIT
stops and the microcomputer enters the wait
and watchdog timer stop. Writing “1”
16
) stops all oscillation and the
Mitsubishi microcomputers
M30240 Group
16
) is set to “1”.