M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 38

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M30240ECFP

Manufacturer Part Number
M30240ECFP
Description
M30240 Group Specification
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
Specifications in this manual are tentative and subject to change
Address Match Interrupt
2.15 Address Match Interrupt
Figure 1.20: Address match interrupt-related registers
An address match interrupt is generated when the address match interrupt address register contents
match the program counter value. Two address match interrupts can be set, each of which can be
enabled and disabled by an address match interrupt enable bit. Address match interrupts are not
affected by the interrupt enable flag (I flag) and processor interrupt priority level (IPL).
Figure 1.20 shows the address match interrupt-related registers.
(b23)
b7
b7
b6
Address match interrupt register i (i = 0, 1)
Address match interrupt enable register
b5
(b19)
b4 b3
b3
b2
(b16)
b0 b7
b1
(b15)
b0
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Address setting register for address match interrupt
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Bit symbol
AIER0
AIER1
Symbol
AIER
(b8)
b0
b7
Address match interrupt 0
Address match interrupt 1
1-38
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Address
0009
Function
Bit name
16
enable bit
enable bit
b0
Symbol
RMAD0
RMAD1
XXXXXX00
When reset
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0012
0016
2
Address
16
16
Values that can be set
to 0010
to 0014
00000
Function
16
16
16
Mitsubishi microcomputers
to FFFFF
M30240 Group
When reset
X00000
X00000
16
R
R
16
16
W
W

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