M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 135
M30240ECFP
Manufacturer Part Number
M30240ECFP
Description
M30240 Group Specification
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30240ECFP.pdf
(142 pages)
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Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
Frequency Synthesizer Interface and DC-DC Converter
Figure 1.118: PLL, DC-DC Converter and USB Functional Block Diagram
5.1.2 Set up of Frequency Synthesizer and DC-DC Converter
5.1.2.1 Set up after Hardware Reset
A functional block diagram of the USB system on the M30240 which shows how the control signals
affect operation is given in Figure 1.118
A Hardware Reset occurs when either the RESET pin is brought low for more than 2 s or an invalid
opcode is fetched by the CPU. The frequency synthesizer (PLL) and DC-DC converter should be set
up as follows in the Hardware Reset routine (see Figure 1.119),
• Power up the M30240 and other components on the peripheral device for less than 100 mA opera-
• Configure the PLL for 48MHz f(VCO) operation.
• Enable the PLL by setting FSE (bit 0 of the Frequency Synthesizer Control Register (FSC)) to a “1”,
• Check the lock status bit (LS, bit 7 of FSC).
• Enable the DC-DC converter in high current mode by setting USBC4 (bit 4 of the USB Control Reg-
• Wait (C + 1)ms (where C equals the external capacitance connected to the Ext Cap pin in
tion. The current limit only applies for bus powered devices.
then wait for 2 ms.
ister (USBC)) to a “1” and keeping USBC3 (bit 3 of USBC) a “0”. High current mode should always
be used during normal USB operation. Low current mode should only be used during a USB sus-
pend.
the voltage on Ext Cap to reach a steady state voltage of approximately 3.3V. (Since the D+ pullup
is connected to the Ext Cap pin, the upstream hub will detect that the peripheral device has been
plugged in once the voltage on D+ reaches approximately 2.0 V.)
• If the bit is a “1”, go on.
• If the bit is a “0”, wait 0.1 ms longer and then re-check the bit.
• Example: A 2.2 F capacitor connected to Ext Cap requires 3.2 ms for the voltage on Ext Cap to be stable.
f(Xin)
enable
FSE
USBCLK
Synthesizer
(48MHz)
Frequency
USBC7
enable
lock
LS
USB FCU
USBC5
(enable)
1-135
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
USBC7
enable
USBC4
enable
DC-DC Converter
USB Transceiver
(enable)
current
mode
Mitsubishi microcomputers
USBC3
M30240 Group
2.2 F
Ext Cap
D+
D-
33
33
0.1 F
F) for
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