M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 101
M30240ECFP
Manufacturer Part Number
M30240ECFP
Description
M30240 Group Specification
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30240ECFP.pdf
(142 pages)
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Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 1.90: Typical receive timing in UART mode
Figure 1.91: Timing for switching serial data logic
2.23.2.1 Sleep mode (UART0, UART1)
2.23.2.2 Function for switching serial data logic (UART2)
Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit)
BRGi count
source
Receive enable bit
RxDi
Transfer clock
Receive
complete flag
RTSi
Receive interrupt
request bit
This mode is used to transfer data between specific microcomputers among multiple microcomputers con-
nected using UARTi. The sleep mode is selected when the sleep select bit (bit 7 at addresses 03A0
03A8
received data = “1” and does not perform receive operation when the MSB = “0”.
When the data logic select bit (bit 6 of address 037D
mission buffer register or reading the reception buffer register. Figure 1.91 shows the example of timing for
switching serial data logic.
Transfer clock
• When LSB first, parity enabled, one stop bit
16
(no reverse)
) is set to “1” during reception. In this mode, the unit performs receive operation when the MSB of the
(reverse)
TxD
TxD
2
2
“1”
“0”
“1”
“0”
“H”
“L”
“1”
“0”
“H”
“H”
“H”
“L”
“L”
“L”
The above timing applies to the following settings :
Reception triggered when transfer clock
is generated by falling edge of start bit
•Parity is disabled.
•One stop bit.
•RTS function is selected.
ST
ST
Start bit
D0
D0
Sampled “L”
D1
D1
1-101
Cleared to “0” when interrupt request is accepted, or cleared by software
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D2
D2
D
D3
D3
16
0
) is assigned 1, data is inverted in writing to the trans-
Receive data taken in
Transferred from UARTi receive register to
UARTi receive buffer register
D4
D4
D5
D5
D
1
D6
D6
D
D7
D7
Mitsubishi microcomputers
7
ST : Start bit
P : Even parity
SP : Stop bit
M30240 Group
P
P
Stop bit
SP
SP
16
,
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