M30240ECFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30240ECFP Datasheet - Page 125

• Manufacturer Part Number: M30240ECFP
• Description: M30240 Group Specification
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Preliminary Specifications REV. E
Specifications in this manual are tentative and subject to change
Usage Precautions
3.1.4 DMAC
3.1.5 Interrupts
3.1.6 Noise
3.1.7 Stop Mode and Wait Mode
When the DMA enable bit (bit 3 of DM0CON and DM1CON) is set to “1”, the DMAC is in an active
state.
The DMA request bit (bit 2 of DM0CON and DM1CON) is set to “1” when a request for DMA transfer
occurs, regardless of the state of the DMA enable bit.
If the DMAC is active when the request bit becomes “1”, the data transfer begins immediately. The
request bit is cleared to “0” when the transfer begins. It is also possible for the DMA request bit to get
set to a “1” due to the DMA request cause select bits being changed. Therefore, the DMA request bit
should be cleared (“0”) after changing the DMA request cause select bits.
To best judge the state of the DMAC, the DMA enable bit should be read instead of the DMA request
bit.
• Reading address 00000
• Setting the stack pointer
• Setting interrupts
• The NMI interrupt
To reduce the possibility of noise problems:
• Connect a bypass capacitor (approximately 0.1 uF) across the Vss pin and the Vcc pin with the short-
• Use circuit traces with a larger diameter than other signal traces for Vss and Vcc.
• When returning from stop mode by hardware reset, RESET pin must be set to “L” level until main
• When entering either wait or stop mode, you must first enable any interrupts you want to cancel the
est possible wiring
clock oscillation is stabilized.
wait or stop. Also, make sure to disable any interrupts that you don’t want to cancel the wait or stop.
If only hardware reset or NMI interrupts are desired to cancel wait or stop, all other interrupt priority
levels should be set to “0”.
• When a maskable interrupts occurs, the CPU reads the interrupt information (the interrupt number and in-
• The value of the stack pointer is initialized to 00000
• When using the NMI interrupt, initialize the stack pointer at the beginning of a program. Concerning the first
• Changing the Interrupt Priority Level select bit (ILVL) and clearing the Interrupt Request bit (IR) in the In-
•
•
terrupt request level) in the interrupt sequence.
The interrupt request bit of the corresponding interrupt written in address 00000
Reading address 00000
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 00000
setting a value in the stack pointer may cause program runaway. Be sure to set a value in the stack pointer
before accepting an interrupt.
instruction immediately after reset, generating any interrupts including the NMI interrupt is prohibited.
terrupt Control Registers (ICR) while the Interrupt enable flag (I-FLAG) is “1”, may result in unintended op-
erations, such as BRK and other interrupts being generated. It is recommended that the interrupts be
disabled by clearing the I-FLAG before setting ILVL or clearing the IR bit. To prevent the I-FLAG from being
set before the ICR is rewritten due to the effects of the instruction queue, instructions that equal a minimum
of 2 cycles should be inserted between writing to the ICR and setting the I-FLAG (2-NOPs, I MOV, I POP,
etc.)
As for the NMI interrupt pin, an interrupt cannot be prohibited. Connect it to the Vcc pin if unused.
Do not get into stop mode or wait mode with the NMI pin set to “0”.
16
16
by software sets enabled highest priority interrupt source request bit to “0”.
16
by software.
1-125
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
immediately after reset. Accepting an interrupt before
Mitsubishi microcomputers
M30240 Group
16
is then set to “0”.