MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 135

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

MPR Register Address Definitions and Bursting Order
Table 72: MPR Readouts and Burst Order Bit Mapping
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
MR3[2]
1
1
1
MR3[1:0]
00
01
10
READ predefined pattern
for system calibration
fixed READ burst and READ burst chop (MRS and OTF via A12/BC#) with regular READ
latencies and AC timings applicable, provided the DLL is locked as required.
MPR addressing for a valid MPR read is as follows:
• A[1:0] must be set to 00 as the burst order is fixed per nibble
• A2 selects the burst order:
• For burst chop 4 cases, the burst order is switched on the nibble base along with the
• Burst order bit 0 (the first bit) is assigned to LSB, and burst order bit 7 (the last bit) is
• A[9:3] are a “Don’t Care”
• A10 is a “Don’t Care”
• A11 is a “Don’t Care”
• A12: Selects burst chop mode on-the-fly, if enabled within MR0
• A13 is a “Don’t Care”
• BA[2:0] are a “Don’t Care”
The MPR currently supports a single data format. This data format is a predefined read
pattern for system calibration. The predefined pattern is always a repeating 0–1 bit pat-
tern.
Examples of the different types of predefined READ pattern bursts are shown in the fol-
lowing figures.
– BL8, A2 is set to 0, and the burst order is fixed to 0, 1, 2, 3, 4, 5, 6, 7
following:
– A2 = 0; burst order = 0, 1, 2, 3
– A2 = 1; burst order = 4, 5, 6, 7
assigned to MSB
Function
RFU
RFU
Length
Burst
BC4
BC4
BL8
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135
1Gb: x8, x16 Automotive DDR3 SDRAM
A[2:0]
Read
000
000
100
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
Predefined pattern: 0, 1, 0, 1, 0, 1, 0, 1
Burst Order and Data Pattern
Burst order: 0, 1, 2, 3, 4, 5, 6, 7
Predefined pattern: 0, 1, 0, 1
Predefined pattern: 0, 1, 0, 1
Mode Register 3 (MR3)
Burst order: 0, 1, 2, 3
Burst order: 4, 5, 6, 7
‹ 2010 Micron Technology, Inc. All rights reserved.
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