MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 79

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MT41J64M16JT-15E AIT:G

Manufacturer Part Number
MT41J64M16JT-15E AIT:G
Description
DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
Manufacturer
Micron
Datasheet
Table 52: Electrical Characteristics and AC Operating Conditions for Speed Extensions (Continued)
Notes 1–8 apply to the entire table
Parameter
DQS, DQS# rising to CK, CK# rising
DQS, DQS# differential input low pulse width
DQS, DQS# differential input high pulse width
DQS, DQS# falling setup to CK, CK# rising
DQS, DQS# falling hold from CK, CK# rising
DQS, DQS# differential WRITE preamble
DQS, DQS# differential WRITE postamble
DQS, DQS# rising to/from rising CK, CK#
DQS, DQS# rising to/from rising CK, CK# when DLL is disabled
DQS, DQS# differential output high time
DQS, DQS# differential output low time
DQS, DQS# Low-Z time (RL - 1)
DQS, DQS# High-Z time (RL + BL/2)
DQS, DQS# differential READ preamble
DQS, DQS# differential READ postamble
DLL locking time
CTRL, CMD, ADDR
setup to CK,CK#
CTRL, CMD, ADDR
setup to CK,CK#
CTRL, CMD, ADDR hold from CK,CK#
Minimum CTRL, CMD, ADDR pulse width
ACTIVATE to internal READ or WRITE delay
PRECHARGE command period
Base (specification)
V
Base (specification)
V
Base (specification)
V
REF
REF
REF
@ 1 V/ns
@ 1 V/ns
@ 1 V/ns
Command and Address Timing
DQ Strobe Output Timing
DQ Strobe Input Timing
(DLL_DIS)
Symbol
(AC175)
(AC150)
(DC100)
t
t
t
t
t
t
DQSCK
DQSCK
HZDQS
t
t
t
LZDQS
t
t
t
DQSH
WPRE
WPST
DQSS
DQSL
t
t
t
t
t
RPRE
DLLK
t
RPST
DSH
QSH
RCD
QSL
IPW
DSS
t
t
t
t
RP
IH
IS
IS
See Speed Bin Tables
See Speed Bin Tables
–0.27
–195
–390
Min
0.45
0.45
0.18
0.18
0.40
0.40
512
200
150
275
100
200
535
(page 64) for
0.9
0.3
0.9
0.3
65
(page 64) for
1
DDR3-1866
Note 24
Note 27
t
Max
RCD
0.27
0.55
0.55
t
195
195
195
RP
10
Unit
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
ps
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
Notes
22, 23
22, 23
23, 24
23, 27
29, 30
20, 30
29, 30
20, 30
29, 30
20, 30
25
25
25
23
26
21
21
28
41
31
31

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