MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 179

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MT41J64M16JT-15E AIT:G

Manufacturer Part Number
MT41J64M16JT-15E AIT:G
Description
DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
Manufacturer
Micron
Datasheet
On-Die Termination (ODT)
Figure 104: On-Die Termination
Functional Representation of ODT
Nominal ODT
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
On-die termination (ODT) is a feature that enables the DRAM to enable/disable and
turn on/off termination resistance for each DQ, DQS, DQS#, and DM for the x4 and x8
configurations (and TDQS, TDQS# for the x8 configuration, when enabled). ODT is ap-
plied to each DQ, UDQS, UDQS#, LDQS, LDQS#, UDM, and LDM signal for the x16 con-
figuration.
ODT is designed to improve signal integrity of the memory channel by enabling the
DRAM controller to independently turn on/off the DRAM’s internal termination resist-
ance for any grouping of DRAM devices. ODT is not supported during DLL disable
mode (simple functional representation shown below). The switch is enabled by the in-
ternal ODT control logic, which uses the external ODT ball and other control informa-
tion.
The value of R
several mode register bits (see Table 81 (page 182)). The ODT ball is ignored while in
self refresh mode (must be turned off prior to self refresh entry) or if mode registers
MR1 and MR2 are programmed to disable ODT. ODT is comprised of nominal ODT and
dynamic ODT modes and either of these can function in synchronous or asynchronous
mode (when the DLL is off during precharge power-down or when the DLL is synchro-
nizing). Nominal ODT is the base termination and is used in any allowable ODT state.
Dynamic ODT is applied only during writes and provides OTF switching from no R
R
The actual effective termination, R
nonlinearity of the termination. For R
teristics (page 47).
ODT (NOM) is the base termination resistance for each applicable ball; it is enabled or
disabled via MR1[9, 6, 2] (see Mode Register 1 (MR1) Definition), and it is turned on or
off via the ODT ball.
To other
circuitry
such as
RCV,
. . .
TT,nom
to R
ODT
TT(WR)
TT
Switch
(ODT termination resistance value) is determined by the settings of
.
R
TT
V
DDQ
179
/2
1Gb: x8, x16 Automotive DDR3 SDRAM
TT(EFF)
TT(EFF)
Micron Technology, Inc. reserves the right to change products or specifications without notice.
, may be different from R
DQ, DQS, DQS#,
DM, TDQS, TDQS#
values and calculations, see ODT Charac-
On-Die Termination (ODT)
‹ 2010 Micron Technology, Inc. All rights reserved.
TT
targeted due to
TT
or

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