MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 191

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

DQS, DQS#
Figure 112: ODT During READs
Command
Address
ODT
CK#
R
DQ
CK
TT
READ
Valid
T0
NOP
T1
Note:
NOP
T2
1. ODT must be disabled externally during READs by driving ODT LOW. For example, CL = 6; AL = CL - 1 = 5; RL = AL
NOP
T3
+ CL = 11; CWL = 5; ODTLon = CWL + AL - 2 = 8; ODTLoff = CWL + AL - 2 = 8. R
Care.”
NOP
T4
ODTLoff = CWL + AL - 2
R
TT,nom
RL = AL + CL
NOP
T5
NOP
T6
NOP
T7
NOP
T8
NOP
T9
t
AOF (MIN)
t
NOP
AOF (MAX)
T10
ODTLon = CWL + AL - 2
NOP
T11
DI
b
b + 1
DI
NOP
T12
b + 2
DI
b + 3
DI
NOP
TT,nom
T13
b + 4
DI
b + 5
is enabled. R
DI
NOP
T14
b + 6
DI
b + 7
DI
Transitioning
NOP
T15
TT(WR)
t
AON (MAX)
NOP
T16
is a “Don’t
R
TT,nom
Don’t Care
NOP
T17