MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 147

• Manufacturer Part Number: MT41J64M16JT-15E AIT:G
• Description: DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
• Manufacturer: Micron

Figure 64: Consecutive READ Bursts (BL8)
Figure 65: Consecutive READ Bursts (BC4)
Command
DQS, DQS#
Command
DQS, DQS#
Address
Address
DQ 3
CK#
DQ 3
CK
CK#
CK
1
2
1
2
READ
Bank,
Col n
T0
READ
Bank,
Col n
T0
NOP
T1
NOP
T1
Notes:
Notes:
t
CCD
NOP
t
T2
NOP
CCD
T2
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2. The BL8 setting is activated by either MR0[1:0] = 00 or MR0[1:0] = 01 and A12 = 1 during READ command at T0
3. DO n (or b) = data-out from column n (or column b).
4. BL8, RL = 5 (CL = 5, AL = 0).
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2. The BC4 setting is activated by either MR0[1:0] = 10 or MR0[1:0] = 01 and A12 = 0 during READ command at T0
3. DO n (or b) = data-out from column n (or column b).
4. BC4, RL = 5 (CL = 5, AL = 0).
RL = 5
RL = 5
and T4.
and T4.
NOP
NOP
T3
T3
READ
Bank,
Col b
READ
Bank,
Col b
T4
T4
t
RPRE
t
RPRE
NOP
NOP
T5
T5
DO
DO
n
n
n + 1
DO
n + 1
DO
NOP
NOP
T6
T6
n + 2
DO
n + 2
RL = 5
DO
RL = 5
t
RPST
n + 3
DO
n + 3
DO
NOP
NOP
T7
T7
n + 4
DO
n + 5
DO
NOP
NOP
T8
T8
n + 6
DO
t
RPRE
n + 7
DO
NOP
NOP
T9
T9
DO
DO
b
b
b + 1
b + 1
DO
DO
NOP
T10
T10
NOP
b + 2
b + 2
DO
DO
t
RPST
b + 3
b + 3
DO
DO
T11
NOP
NOP
T11
b + 4
DO
b + 5
DO
NOP
T12
NOP
T12
Transitioning Data
b + 6
Transitioning Data
DO
t
RPST
b + 7
DO
NOP
T13
T13
NOP
Don’t Care
Don’t Care
NOP
NOP
T14
T14