MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 178

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MT41J64M16JT-15E AIT:G

Manufacturer Part Number
MT41J64M16JT-15E AIT:G
Description
DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
Manufacturer
Micron
Datasheet
Figure 103: RESET Sequence
All voltage
supplies valid
and stable
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
Command
Address
BA[2:0]
RESET#
ODT
DQS
System RESET
CK#
CKE
A10
(warm boot)
DM
DQ
R
CK
TT
t
T = 100ns (MIN)
IOZ = 20ns
MAX (10ns, 5
T = 10ns (MIN)
High-Z
High-Z
High-Z
T (MIN) =
Note:
T = 500μs (MIN)
t
Stable and
valid clock
CK)
1
1. The minimum time required is the longer of 10ns or 5 clocks.
t
t
IS
IS
NOP
T0
DRAM ready
for external
commands
t
CL
t
t
XPR
CK
t
CL
BA1 = H
BA0 = L
BA2 = L
Code
Code
MR2
T1
MRS
t
MRD
BA0 = H
BA1 = H
BA2 = L
MR3
Code
Code
MRS
178
t
MRD
1Gb: x8, x16 Automotive DDR3 SDRAM
DLL ENABLE
MR1 with
BA0 = H
BA1 = L
BA2 = L
Ta0
Valid
Code
Code
MRS
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
MRD
DLL RESET
MR0 with
BA0 = L
BA1 = L
BA2 = L
Valid
Code
Code
Tb0
MRS
t
MOD
Indicates break
in time scale
A10 = H
ZQCAL
Valid
Tc0
t
ZQCL
DLLK
‹ 2010 Micron Technology, Inc. All rights reserved.
RESET Operation
t
ZQinit
operation
Normal
Td0
Valid
Valid
Valid
Valid
Valid
Valid
Don’t Care

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