MT41J64M16JT-15E AIT:G Micron, MT41J64M16JT-15E AIT:G Datasheet - Page 142

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MT41J64M16JT-15E AIT:G

Manufacturer Part Number
MT41J64M16JT-15E AIT:G
Description
DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin FBGA
Manufacturer
Micron
Datasheet
ZQ CALIBRATION Operation
Figure 60: ZQ CALIBRATION Timing (ZQCL and ZQCS)
PDF: 09005aef84491df3
1Gb_AIT_AAT_DDR3_SDRAM.pdf – Rev. C 8/11 EN
Command
Address
ODT
CK#
A10
CKE
DQ
CK
ZQCL
1
2
3
T0
Notes:
NOP
T1
The ZQ CALIBRATION command is used to calibrate the DRAM output drivers (R
and ODT values (R
240 (±1%) external resistor is connected from the DRAM’s ZQ ball to V
DDR3 SDRAM require a longer time to calibrate R
and self refresh exit, and a relatively shorter time to perform periodic calibrations.
DDR3 SDRAM defines two ZQ CALIBRATION commands: ZQCL and ZQCS. An example
of ZQ calibration timing is shown below.
All banks must be precharged and
can be issued to the DRAM. No other activities (other than issuing another ZQCL or
ZQCS command) can be performed on the DRAM channel by the controller for the du-
ration of
brate R
ZQ ball’s current consumption path to reduce power.
ZQ CALIBRATION commands can be issued in parallel to DLL RESET and locking time.
Upon self refresh exit, an explicit ZQCL is required if ZQ calibration is desired.
In dual-rank systems that share the ZQ resistor between devices, the controller must not
enable overlap of
1. CKE must be continuously registered HIGH during the calibration procedure.
2. ODT must be disabled via the ODT signal or the MRS during the calibration procedure.
3. All devices connected to the DQ bus should be High-Z during calibration.
t
ZQinit or
High-Z
ON
NOP
Ta0
t
ZQinit or
and ODT. After DRAM calibration is achieved, the DRAM should disable the
t
ZQoper
NOP
Ta1
t
ZQinit,
TT
t
ZQoper. The quiet time on the DRAM channel helps accurately cali-
) over process, voltage, and temperature, provided a dedicated
Valid
Valid
Valid
Valid
Valid
Ta2
t
ZQoper, or
142
Activities
Valid
Valid
Valid
Valid
Valid
Ta3
1Gb: x8, x16 Automotive DDR3 SDRAM
t
RP must be met before ZQCL or ZQCS commands
t
ZQCS between ranks.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
ZQCS
Tb0
1
2
3
ON
NOP
Tb1
ZQ CALIBRATION Operation
and ODT at power-up initialization
High-Z
Indicates break
in time scale
t
NOP
ZQCS
Tc0
‹ 2010 Micron Technology, Inc. All rights reserved.
NOP
Tc1
SSQ
Don’t Care
.
Valid
Valid
Valid
Valid
Valid
Tc2
Activ-
ities
ON
)

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