DSPIC33EP128MC504-I/ML Microchip Technology, DSPIC33EP128MC504-I/ML Datasheet - Page 131

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DSPIC33EP128MC504-I/ML

Manufacturer Part Number
DSPIC33EP128MC504-I/ML
Description
Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
Manufacturer
Microchip Technology
Type
dsPIC33E/PIC24Er
Datasheet

Specifications of DSPIC33EP128MC504-I/ML

Rohs
yes
Core
dsPIC33E
Data Bus Width
16 bit
Program Memory Size
128 KB
Data Ram Size
16 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
35
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
70 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Family / Core
dsPIC33E/PIC24E
Interface Type
CAN, I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
REGISTER 7-2:
 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 3
Note 1:
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
R/W-0
R/W-0
SATA
VAR
2:
For complete register details, see
The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.
VAR: Variable Exception Processing Latency Control bit
1 = Variable exception processing enabled
0 = Fixed exception processing enabled
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
R/W-0
SATB
U-0
CORCON: CORE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
SATDW
R/W-0
R/W-1
US<1:0>
Register
ACCSAT
R/W-0
R/W-0
3-2.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
IPL3
R/W-0
R/C-0
EDT
(2)
(1)
SFA
R-0
R-0
x = Bit is unknown
DL<2:0>
R/W-0
RND
R-0
DS70657F-page 131
R/W-0
R-0
IF
bit 8
bit 0

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