DSPIC33EP128MC504-I/ML Microchip Technology, DSPIC33EP128MC504-I/ML Datasheet - Page 347

• Manufacturer Part Number: DSPIC33EP128MC504-I/ML
• Description: Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
• Manufacturer: Microchip Technology
• Type: dsPIC33E/PIC24Er

Specifications of DSPIC33EP128MC504-I/ML

• Rohs: yes
• Core: dsPIC33E
• Data Bus Width: 16 bit
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 70 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33E/PIC24E
• Interface Type: CAN, I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

 2011-2012 Microchip Technology Inc.
TABLE 24-1:
bit 3-0
Note 1:
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2:
3:
PTGCTRL
PTGADD
PTGCOPY
Command
All reserved commands or options will execute but have no effect (i.e., execute as a NOP instruction).
Refer to
This feature is only available on dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices.
Step
(1)
(1)
(1)
PTG STEP COMMAND FORMAT (CONTINUED)
Table 24-2
OPTION<3:0>
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
for the trigger output descriptions.
Reserved
Reserved
Disable Step Delay Timer (PTGSD)
Reserved
Reserved
Reserved
Enable Step Delay Timer (PTGSD)
Reserved
Start and wait for the PTG Timer 0 to match Timer 0 Limit Register
Start and wait for the PTG Timer 1 to match Timer 1 Limit Register
Reserved
Wait for software trigger bit transition from low to high before continuing
(PTGSWT = 0 to 1)
Copy contents of the Counter 0 register to the AD1CHS0 register
Copy contents of the Counter 1 register to the AD1CHS0 register
Copy contents of the Literal 0 register to the AD1CHS0 register
Generate triggers indicated in the Broadcast Trigger Enable Register
(PTGBTE)
Add contents of PTGADJ register to the Counter 0 Limit register (PTGC0LIM)
Add contents of PTGADJ register to the Counter 1 Limit register (PTGC1LIM)
Add contents of PTGADJ register to the Timer 0 Limit register (PTGT0LIM)
Add contents of PTGADJ register to the Timer 1 Limit register (PTGT1LIM)
Add contents of PTGADJ register to the Step Delay Limit register (PTGSDLIM)
Add contents of PTGADJ register to the Literal 0 register (PTGL0)
Reserved
Reserved
Copy contents of PTGHOLD register to the Counter 0 Limit register
(PTGC0LIM)
Copy contents of PTGHOLD register to the Counter 1 Limit register
(PTGC1LIM)
Copy contents of PTGHOLD register to the Timer 0 Limit register (PTGT0LIM)
Copy contents of PTGHOLD register to the Timer 1 Limit register (PTGT1LIM)
Copy contents of PTGHOLD register to the Step Delay Limit register
(PTGSDLIM)
Copy contents of PTGHOLD register to the Literal 0 register (PTGL0)
Reserved
Reserved
Option Description
DS70657F-page 347