DSPIC33EP128MC504-I/ML Microchip Technology, DSPIC33EP128MC504-I/ML Datasheet - Page 38

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DSPIC33EP128MC504-I/ML

Manufacturer Part Number
DSPIC33EP128MC504-I/ML
Description
Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
Manufacturer
Microchip Technology
Type
dsPIC33E/PIC24Er
Datasheet

Specifications of DSPIC33EP128MC504-I/ML

Rohs
yes
Core
dsPIC33E
Data Bus Width
16 bit
Program Memory Size
128 KB
Data Ram Size
16 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
35
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
70 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Family / Core
dsPIC33E/PIC24E
Interface Type
CAN, I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
3.7
REGISTER 3-1:
DS70657F-page 38
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Note 1:
R/W-0
R/W-0
OA
2:
3:
4:
(1)
CPU Control Registers
(2,3)
This bit is available on dsPIC33EPXXXMC20X/50X and dsPIC33EPXXXGP50X devices only.
The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority
Level. The value in parentheses indicates the IPL, if IPL<3> = 1. User interrupts are disabled when
IPL<3> = 1.
The IPL<2:0> Status bits are read only when the NSTDIS bit (INTCON1<15>) = 1.
A data write to the SR register can modify the SA and SB bits by either a data write to SA and SB or by
clearing the SAB bit. To avoid a possible SA or SB bit write race condition, the SA and SB bits should not
be modified using bit operations.
OA: Accumulator A Overflow Status bit
1 = Accumulator A has overflowed
0 = Accumulator A has not overflowed
OB: Accumulator B Overflow Status bit
1 = Accumulator B has overflowed
0 = Accumulator B has not overflowed
SA: Accumulator A Saturation ‘Sticky’ Status bit
1 = Accumulator A is saturated or has been saturated at some time
0 = Accumulator A is not saturated
SB: Accumulator B Saturation ‘Sticky’ Status bit
1 = Accumulator B is saturated or has been saturated at some time
0 = Accumulator B is not saturated
OAB: OA || OB Combined Accumulator Overflow Status bit
1 = Accumulators A or B have overflowed
0 = Neither Accumulators A or B have overflowed
SAB: SA || SB Combined Accumulator ‘Sticky’ Status bit
1 = Accumulators A or B are saturated or have been saturated at some time
0 = Neither Accumulator A or B are saturated
DA: DO Loop Active bit
1 = DO loop in progress
0 = DO loop not in progress
DC: MCU ALU Half Carry/Borrow bit
1 = A carry-out from the 4th low order bit (for byte-sized data) or 8th low order bit (for word-sized data)
0 = No carry-out from the 4th low order bit (for byte-sized data) or 8th low order bit (for word-sized
IPL<2:0>
R/W-0
R/W-0
of the result occurred
data) of the result occurred
OB
SR: CPU STATUS REGISTER
(1)
(2,3)
W = Writable bit
‘1’= Bit is set
R/W-0
SA
R/W-0
(1,4)
(2,3)
(1)
SB
R/W-0
R-0
RA
(1,4)
(1)
(1)
U = Unimplemented bit, read as ‘0’
C = Clearable bit
‘0’ = Bit is cleared
OAB
R/W-0
R/C-0
(1,4)
(1,4)
N
(1)
(1)
(1)
SAB
R/W-0
R/C-0
OV
(1)
 2011-2012 Microchip Technology Inc.
x = Bit is unknown
R/W-0
DA
R -0
Z
(1)
R/W-0
R/W-0
DC
C
bit 8
bit 0

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