DSPIC33EP128MC504-I/ML Microchip Technology, DSPIC33EP128MC504-I/ML Datasheet - Page 249

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DSPIC33EP128MC504-I/ML

Manufacturer Part Number
DSPIC33EP128MC504-I/ML
Description
Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
Manufacturer
Microchip Technology
Type
dsPIC33E/PIC24Er
Datasheet

Specifications of DSPIC33EP128MC504-I/ML

Rohs
yes
Core
dsPIC33E
Data Bus Width
16 bit
Program Memory Size
128 KB
Data Ram Size
16 KB
Maximum Clock Frequency
7.37 MHz, 32 kHz
Number Of Programmable I/os
35
Number Of Timers
5 x 16-bit, 2 x 32-bit
Device Million Instructions Per Second
70 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Family / Core
dsPIC33E/PIC24E
Interface Type
CAN, I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
Yes
Product
DSPs
Program Memory Type
Flash
Supply Current
10 mA
17.0
 2011-2012 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2: Some registers and associated bits
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
(dsPIC33EPXXXMC20X/50X
and PIC24EPXXXMC20X
DEVICES ONLY)
of
dsPIC33EPXXXMC20X/50X,
PIC24EPXXXGP/MC20X
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Quadrature
Encoder Interface (QEI)” (DS70601) of
the
Reference Manual”, which is available
from
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
the
“dsPIC33E/PIC24E
Microchip
dsPIC33EPXXXGP50X,
families
web
Family
and
site
of
in
This chapter describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
The operational features of the QEI module include:
• 32-bit position counter
• 32-bit Index pulse counter
• 32-bit Interval timer
• 16-bit velocity counter
• 32-bit Position Initialization/Capture/Compare
• 32-bit Position Compare Low register
• x4 Quadrature Count mode
• External Up/Down Count mode
• External Gated Count mode
• External Gated Timer mode
• Internal Timer mode
Figure 17-1
High register
illustrates the QEI block diagram.
DS70657F-page 249

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