C8051F021-GQ Silicon Laboratories Inc, C8051F021-GQ Datasheet - Page 30

IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part Number
C8051F021-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F021-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F020DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 8-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
32
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
No. Of Pwm Channels
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.05 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1201

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22
C8051F020/1/2/3
1.9.
Each C8051F020/1/2/3 MCU has two 12-bit DACs and two comparators on chip. The MCU data and control inter-
face to each comparator and DAC is via the Special Function Registers. The MCU can place any DAC or comparator
in low power shutdown mode.
The comparators have software programmable hysteresis. Each comparator can generate an interrupt on its rising
edge, falling edge, or both; these interrupts are capable of waking up the MCU from sleep mode. The comparators'
output state can also be polled in software. The comparator outputs can be programmed to appear on the Port I/O pins
via the Crossbar.
The DACs are voltage output mode, and include a flexible output scheduling mechanism. This scheduling mecha-
nism allows DAC output updates to be forced by a software write or a Timer 2, 3, or 4 overflow. The DAC voltage
reference is supplied via the dedicated VREFD input pin on C8051F020/2 devices or via the internal voltage refer-
ence on C8051F021/3 devices. The DACs are especially useful as references for the comparators or offsets for the
differential inputs of the ADC.
30
Comparators and DACs
(Port I/O)
(Port I/O)
CP0+
CP0-
CP1+
CP1-
DAC0
DAC1
Figure 1.13. Comparator and DAC Diagram
+
-
+
-
CP0
CP1
CP0
CP1
DAC0
DAC1
REF
REF
CROSSBAR
Rev. 1.4
CP0
CP1
SFR's
(Data
Cntrl)
and
Interrupt
Handler
CIP-51
and

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