C8051F021-GQ Silicon Laboratories Inc, C8051F021-GQ Datasheet - Page 83

IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part Number
C8051F021-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F021-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F020DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 8-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
32
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
No. Of Pwm Channels
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.05 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1201
8.
Each C8051F020/1/2/3 device includes two on-chip 12-bit voltage-mode Digital-to-Analog Converters (DACs).
Each DAC has an output swing of 0V to (VREF-1LSB) for a corresponding input code range of 0x000 to 0xFFF. The
DACs may be enabled/disabled via their corresponding control registers, DAC0CN and DAC1CN. While disabled,
the DAC output is maintained in a high-impedance state, and the DAC supply current falls to 1 µA or less. The volt-
age reference for each DAC is supplied at the VREFD pin (C8051F020/2 devices) or the VREF pin (C8051F021/3
devices). Note that the VREF pin on C8051F021/3 devices may be driven by the internal voltage reference or an
external source. If the internal voltage reference is used it must be enabled in order for the DAC outputs to be valid.
See
ENCE (C8051F021/3)” on page 93
8.1.
Each DAC features a flexible output update mechanism which allows for seamless full-scale changes and supports
jitter-free updates for waveform generation. The following examples are written in terms of DAC0, but DAC1 opera-
tion is identical. Note that reads from DAC0L return pre-latch data, meaning the value read is the same as the last
value written to this register, not the value at the DAC0L latch. Reads from DAC0H always return the value at the
DAC0H latch.
Section “9. VOLTAGE REFERENCE (C8051F020/2)” on page 91
DACS, 12-BIT VOLTAGE MODE
DAC Output Scheduling
DAC0MD1
DAC0MD0
DAC1MD1
DAC1MD0
DAC0DF2
DAC0DF1
DAC0DF0
DAC1DF2
DAC1DF1
DAC1DF0
DAC0EN
DAC1EN
Figure 8.1. DAC Functional Block Diagram
8
8
8
8
for more information on configuring the voltage reference for the DACs.
8
8
8
8
12
12
REF
REF
Rev. 1.4
DAC0
DAC1
or
Section “10. VOLTAGE REFER-
C8051F020/1/2/3
AGND
AGND
AV+
AV+
DAC0
DAC1
83

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