C8051F021-GQ Silicon Laboratories Inc, C8051F021-GQ Datasheet - Page 79

IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part Number
C8051F021-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F021-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F020DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 8-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
32
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
No. Of Pwm Channels
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.05 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1201

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Part Number:
C8051F021-GQ
Manufacturer:
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22
Bits7-3:
Bit2:
Bits1-0:
Bits7-3:
Bits2-0:
AD1SC4
R/W
R/W
Bit7
Bit7
-
Figure 7.5. AMX1SL: AMUX1 Channel Select Register (C8051F020/1/2/3)
Figure 7.4. ADC1CF: ADC1 Configuration Register (C8051F020/1/2/3)
AD1SC4-0: ADC1 SAR Conversion Clock Period Bits
SAR Conversion clock is derived from system clock by the following equation, where AD1SC refers
to the 5-bit value held in AD1SC4-0. SAR conversion clock requirements are given in Table 7.1.
AD1SC
UNUSED. Read = 0b. Write = don’t care.
AMP1GN1-0: ADC1 Internal Amplifier Gain (PGA)
00: Gain = 0.5
01: Gain = 1
10: Gain = 2
11: Gain = 4
UNUSED. Read = 00000b; Write = don’t care
AMX1AD2-0: AMX1 Address Bits
000-111b: ADC1 Inputs selected as follows:
000: AIN1.0 selected
001: AIN1.1 selected
010: AIN1.2 selected
011: AIN1.3 selected
100: AIN1.4 selected
101: AIN1.5 selected
110: AIN1.6 selected
111: AIN1.7 selected
AD1SC3
R/W
R/W
Bit6
Bit6
-
=
---------------------- - 1
CLK
SYSCLK
AD1SC2
R/W
R/W
Bit5
Bit5
-
SAR1
AD1SC1
R/W
R/W
Bit4
Bit4
-
AD1SC0
R/W
R/W
Bit3
Bit3
-
Rev. 1.4
AMX1AD2 AMX1AD1 AMX1AD0 00000000
R/W
R/W
Bit2
Bit2
-
AMP1GN1 AMP1GN0 11111000
C8051F020/1/2/3
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
0xAB
0xAC
79

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