EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 119
![IC ARM9 SOC UNIVERSAL 352PBGA](/photos/12/23/122390/mfg_ep9312_series_sml.jpg)
EP9312-CBZ
Manufacturer Part Number
EP9312-CBZ
Description
IC ARM9 SOC UNIVERSAL 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9312-CBZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
2
Digital Ic Case Style
BGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1258
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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DS785UM1
4.1.1 Boot ROM Hardware Operational Overview
4.1.1.1 Memory Map
4.1.2 Boot ROM Software Operational Overview
4.1 Introduction
The Boot ROM allows a program or OS to boot from the following devices:
The Boot ROM is an AHB slave device containing a 16 kbyte mask-programmed ROM. The
AHB slave always operates with one wait state, so all data reads from the ROM use 2 HCLK
cycles.
On system reset, the ARM920T begins executing code at address zero. The system follows
the Hardware Configuration controls to select the boot device that appears at address zero. If
Internal Boot is selected, the Boot ROM is mapped to address zero and the ARM920T will
execute the Boot ROM code.
The normal Boot ROM base address base is 0x8009_0000. It will alias on 16 kbyte intervals.
When internal boot is active, the Boot ROM is double decoded and appears at its normal
address base and at address 0x0000_0000. At address 0x0000_0000 plus the current offset,
the Boot ROM can write the BootModeClr bit to remap itself back to 0x8009_0000 plus the current
offset. Execution t
0x8009_0000 space.
The Boot ROM is a 16 kbyte mask-programmed ROM that controls the source of the first off-
chip code that is executed by the ARM Core. The code within the Boot ROM supports the
following sources for the processor’s initialization program:
• SPI Flash
• FLASH, SyncFLASH or SyncROM
• UART1
• UART1: Code is downloaded through UART1 into an on chip buffer and executed
• SPI Serial Flash: Code is copied from an SPI Serial Flash into an on-chip buffer and
• FLASH: Code present in external FLASH memory is executed directly
executed
hen continues with the instruction at the next Boot ROM address in
Copyright 2007 Cirrus Logic
4Boot ROM
Chapter 4
4-1
4
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